st62t62b STMicroelectronics, st62t62b Datasheet - Page 19

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st62t62b

Manufacturer Part Number
st62t62b
Description
8-bit Otp/eprom Mcus With A/d Converter, Auto-reload Timer And Eeprom
Manufacturer
STMicroelectronics
Datasheet

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RESETS (Cont’d)
3.2.3 Watchdog Reset
The MCU provides a Watchdog timer function in
order to ensure graceful recovery from software
upsets. If the Watchdog register is not refreshed
before an end-of-count condition is reached, the
internal reset will be activated. This, amongst oth-
er things, resets the watchdog counter.
The MCU restarts just as though the Reset had
been generated by the RESET pin, including the
built-in stabilisation delay period.
3.2.4 Application Notes
No external resistor is required between V
the Reset pin, thanks to the built-in pull-up device.
The POR circuit operates dynamically, in that it
triggers MCU initialization on detecting the rising
edge of V
of 2 volts, but the actual value of the detected
threshold depends on the way in which V
The POR circuit is NOT designed to supervise
static, or slowly rising or falling V
3.2.5 MCU Initialization Sequence
When a reset occurs the stack is reset, the PC is
loaded with the address of the Reset Vector (lo-
cated in program ROM starting at address
0FFEh). A jump to the beginning of the user pro-
gram must be coded at this address. Following a
Figure 12. Reset Block Diagram
RESET
DD
. The typical threshold is in the region
V
DD
WATCHDOG RESET
POWER
300k
2.8k
ON RESET
DD
.
f
OSC
DD
DD
rises.
and
Reset, the Interrupt flag is automatically set, so
that the CPU is in Non Maskable Interrupt mode;
this prevents the initialisation routine from being
interrupted. The initialisation routine should there-
fore be terminated by a RETI instruction, in order
to revert to normal mode and enable interrupts. If
no pending interrupt is present at the end of the in-
itialisation routine, the MCU will continue by
processing the instruction immediately following
the RETI instruction. If, however, a pending inter-
rupt is present, it will be serviced.
Figure 11. Reset and Interrupt Processing
RESET
VECTOR
RESET
INITIALIZATION
ROUTINE
CK
RESET
COUNTER
ST62T52B ST62T62B/E62B
RESET
RETI
JP
JP:2 BYTES/4 CYCLES
RETI: 1 BYTE/2 CYCLES
ST6
INTERNAL
RESET
VA0200B
VA00181
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