st62t62b STMicroelectronics, st62t62b Datasheet - Page 36

• Manufacturer Part Number: st62t62b
• Description: 8-bit Otp/eprom Mcus With A/d Converter, Auto-reload Timer And Eeprom
• Manufacturer: STMicroelectronics

36
ST62T52B ST62T62B/E62B
4.2 TIMER
The MCU features an on-chip Timer peripheral,
consisting of an 8-bit counter with a 7-bit program-
mable prescaler, giving a maximum count of 2
Figure 21.
content of the 8-bit counter can be read/written in
the Timer/Counter register, TCR, which can be
addressed in Data space as a RAM location at ad-
dress 0D3h. The state of the 7-bit prescaler can
be read in the PSC register at address 0D2h. The
control logic device is managed in the TSCR reg-
ister as described in the following paragraphs.
The 8-bit counter is decrement by the output (ris-
ing edge) coming from the 7-bit prescaler and can
be loaded and read under program control. When
it decrements to zero then the TMZ (Timer Ze-
ro)bit in the TSCR is set. If the ETI (Enable Timer
Interrupt) bit in the TSCR is also set, an interrupt
request is generated. The Timer interrupt can be
used to exit the MCU from WAIT mode.
Figure 21. Timer Block Diagram
36/68
.
f
INT
shows the Timer Block Diagram. The
12
PSC
8
6
5
4
3
2
1
0
SELECT
1 OF 7
15
.
DATA BUS
The prescaler input is the internal frequency (f
divided by 12. The prescaler decrements on the
rising edge. Depending on the division factor pro-
grammed by PS2, PS1 and PS0 bits in the TSCR
(see
ter register is multiplexed to different sources. For
division factor 1, the clock input of the prescaler is
also that of timer/counter; for factor 2, bit 0 of the
prescaler register is connected to the clock input
of TCR. This bit changes its state at half the fre-
quency of the prescaler input clock. For factor 4,
bit 1 of the PSC is connected to the clock input of
TCR, and so forth. The prescaler initialize bit, PSI,
in the TSCR register must be set to allow the pres-
caler (and hence the counter) to start. If it is
cleared, all the prescaler bits are set and the coun-
ter is inhibited from counting. The prescaler can
be loaded with any value between 0 and 7Fh, if bit
PSI is set. The prescaler tap is selected by means
of the PS2/PS1/PS0 bits in the control register.
Figure 22.
8-BIT
/
3
8
Table
illustrates the Timer’s working principle.
13.), the clock input of the timer/coun-
TMZ ETI
b7
b6
STATUS/CONTROL
D5
b5
REGISTER
D4
b4
8
PSI PS2 PS1 PS0
b3
b2 b1
INTERRUPT
LINE
VR02070A
b0
INT
.
)