st62t62b STMicroelectronics, st62t62b Datasheet - Page 37

• Manufacturer Part Number: st62t62b
• Description: 8-bit Otp/eprom Mcus With A/d Converter, Auto-reload Timer And Eeprom
• Manufacturer: STMicroelectronics

TIMER (Cont’d)
4.2.1 Timer Operation
The Timer prescaler is clocked by the prescaler
clock input (f
The user can select the desired prescaler division
ratio through the PS2, PS1, PS0 bits. When the
TCR count reaches 0, it sets the TMZ bit in the
TSCR. The TMZ bit can be tested under program
control to perform a timer function whenever it
goes high.
4.2.2 Timer Interrupt
When the counter register decrements to zero
with the ETI (Enable Timer Interrupt) bit set to one,
an interrupt request associated with Interrupt Vec-
tor #3 is generated. When the counter decrements
Figure 22. Timer Working Principle
CLOCK
INT
0
÷ 12).
BIT0
BIT0
1
BIT1
BIT1
2
BIT2
BIT2
7-BIT PRESCALER
8-1 MULTIPLEXER
8-BIT COUNTER
BIT3
3
BIT3
to zero, the TMZ bit in the TSCR register is set to
one.
4.2.3 Application Notes
TMZ is set when the counter reaches zero; how-
ever, it may also be set by writing 00h in the TCR
register or by setting bit 7 of the TSCR register.
The TMZ bit must be cleared by user software
when servicing the timer interrupt to avoid unde-
sired interrupts when leaving the interrupt service
routine. After reset, the 8-bit counter register is
loaded with 0FFh, while the 7-bit prescaler is load-
ed with 07Fh, and the TSCR register is cleared.
This means that the Timer is stopped (PSI=“0”)
and the timer interrupt is disabled.
BIT4
4
BIT4
BIT5
5
ST62T52B ST62T62B/E62B
BIT5
BIT6
6
BIT6
BIT7
7
VA00186
PS0
PS1
PS2
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