st62t25cn6 STMicroelectronics, st62t25cn6 Datasheet - Page 12

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st62t25cn6

Manufacturer Part Number
st62t25cn6
Description
8-bit Mcus With A/d Converter, Two Timers, Oscillator Safeguard & Safe Reset
Manufacturer
STMicroelectronics
Datasheet
ST6215C/ST6225C
MEMORY MAP (Cont’d)
Table 2. Hardware Register Map
Legend:
x = undefined, R/W = Read/Write, Ro = Read-only Bit(s) in the register, Wo = Write-only Bit(s)
in the register.
Notes:
1. The contents of the I/O port DR registers are readable only in output configuration. In input configura-
tion, the values of the I/O pins are returned instead of the DR register contents.
2. The bits associated with unavailable pins must always be kept at their reset value.
3. Do not use single-bit instructions (SET, RES...) on Port Data Registers if any pin of the port is configured
in input mode (refer to
12/105
1
Address
to 0D7h
to 0FEh
to 083h
0CAh
0CBh
0C0h
0C1h
0C2h
0C3h
0C4h
0C5h
0C6h
0C7h
0C8h
0C9h
0D0h
0D1h
0D2h
0D3h
0D4h
0D5h
0D8h
0D9h
0FFh
080h
0CCh
0CDh
0CEh
0CFh
Watchdog
I/O Ports
I/O Ports
I/O Ports
Timer1
Block
Timer
ROM
CPU
CPU
ADC
CPU
Section 8 "I/O PORTS" on page 38
X,Y,V,W
DRA
DRB
DRC
DDRA
DDRB
DDRC
IOR
DRWR
ORA
ORB
ORC
ADR
ADCR
PSCR
TCR
TSCR
WDGR
A
Register
Label
1) 2) 3)
1) 2) 3)
1) 2) 3)
2)
2)
2)
2)
2)
2)
X,Y index registers
V,W short direct registers
Port A Data Register
Port B Data Register
Port C Data Register
Port A Direction Register
Port B Direction Register
Port C Direction Register
Interrupt Option Register
Data ROM Window register
Port A Option Register
Port B Option Register
Port C Option Register
A/D Converter Data Register
A/D Converter Control Register
Timer 1 Prescaler Register
Timer 1 Counter Register
Timer 1 Status Control Register
Watchdog Register
Accumulator
Reserved (38 Bytes)
Reserved (2 Bytes)
Reserved (3 Bytes)
Reserved (1 Byte)
Reserved (1 Byte)
Reserved (1 byte)
Register Name
for more details).
Status
Reset
0FFh
0FEh
7Fh
00h
00h
00h
00h
00h
00h
40h
00h
xxh
xxh
xxh
xxh
xxh
00h
00h
00h
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Write-only
Write-only
R/W
R/W
R/W
Read-only
Ro/Wo
R/W
R/W
R/W
R/W
R/W
Remarks

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