st62t25cn6 STMicroelectronics, st62t25cn6 Datasheet - Page 62

• Manufacturer Part Number: st62t25cn6
• Description: 8-bit Mcus With A/d Converter, Two Timers, Oscillator Safeguard & Safe Reset
• Manufacturer: STMicroelectronics

ST6215C/ST6225C
Opcode Map Summary (Continued)
Abbreviations for Addressing Modes: Legend:
dir
sd
imm
inh
ext
b.d
bt
pcr
ind
62/105
1
HI
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
Direct
Short Direct
Immediate
Inherent
Extended
Bit Direct
Bit Test
Program Counter Relative
Indirect
LOW
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1000
8
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
1001
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
9
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
#
e
b
rr
nn
abc
ee
1010
A
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
5-bit Displacement
Indicates Illegal Instructions
3-bit Address
1-byte Data space address
1-byte immediate data
12-bit address
8-bit Displacement
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
1011
b0,rr
b0,rr
b4,rr
b4,rr
b2,rr
b2,rr
b6,rr
b6,rr
b1,rr
b1,rr
b5,rr
b5,rr
b3,rr
b3,rr
b7,rr
b7,rr
B
RES 2
RES 2
RES 2
RES 2
RES 2
RES 2
RES 2
RES 2
SET 2
SET 2
SET 2
SET 2
SET 2
SET 2
SET 2
SET 2
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
e
1100
C
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
JRZ 4
JRZ 4
JRZ 4
JRZ 4
JRZ 2
JRZ 4
JRZ 2
JRZ 4
JRZ
JRZ 4
JRZ 4
JRZ 4
JRZ 2
JRZ 4
JRZ 2
JRZ 4
pcr 3
pcr 1
pcr
pcr 1
pcr 1
pcr 1
pcr 1
pcr 1
pcr
pcr 1
pcr 1
pcr 1
pcr 1
pcr 1
pcr 1
pcr 1
Addressing Mode
Cycles
Bytes
Operands
1101
rr,nn
w,a
x,a
y,a
v,a
D
w
a
#
a
x
y
v
STOP 2
WAIT 2
COM 2
RETI 2
DEC 2
DEC 2
DEC 2
DEC 2
RCL 2
RET 2
imm 1
LDI 2
inh 1
inh 1
inh 1
LD 2
inh 1
inh 1
LD 2
LD 2
LD 2
sd 1
sd 1
sd 1
sd 1
sd 1
sd 1
sd 1
sd 1
1
2
1
1110
E
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
2
1
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
e
JRC
1111
a,(y)
a,(y)
a,(y)
(y),a
a,(y)
a,(y)
a,rr
a,rr
a,rr
rr,a
a,rr
a,rr
prc
(y)
(y)
F
rr
rr
ADD
ADD
AND
AND
DEC
DEC
SUB
SUB
INC
INC
CP
CP
ind
ind
ind
ind
ind
ind
ind
ind
LD
LD
LD
LD
dir
dir
dir
dir
dir
dir
dir
dir
LOW
Mnemonic
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
HI