mcf5282 Freescale Semiconductor, Inc, mcf5282 Datasheet - Page 233
mcf5282
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mcf5282
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Freescale Semiconductor, Inc
Datasheet
1.MCF5282.pdf
(766 pages)
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13.4.6
The processor runs back-to-back bus cycles whenever possible. For example, when a longword read is
started on a word-size bus, the processor performs two back-to-back word read accesses. Back-to-back
accesses are distinguished by the continuous assertion of TIP throughout the cycle.
read back-to-back with a write.
Basic read and write cycles are used to show a back-to-back cycle, but there is no restriction as to the type
of operations to be placed back to back. The initiation of a back-to-back cycle is not user definable.
Freescale Semiconductor
A[31:0], SIZ[1:0]
A[31:0], SIZ[1:0]
CSn, BSn
CLKOUT
Back-to-Back Bus Cycles
D[31:0]
CSn, BSn
R/W
CLKOUT
OE
TIP
TS
TA
D[31:0]
R/W
TIP
TS
TA
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Figure 13-10. Write Cycle with Fast Termination
Figure 13-11. Back-to-Back Bus Cycles
S0
S1
S0
S2
S3
Read
S1
S4
S4
S5
Write
S0
S5
S1
S2
Write
External Interface Module (EIM)
S3
Figure 13-11
S4
S5
shows a
13-9
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