mcf5282 Freescale Semiconductor, Inc, mcf5282 Datasheet - Page 649
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mcf5282
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Datasheet
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30.5.3.3.7
The pipeline is flushed and refilled before normal instruction execution resumes. Prefetching begins at the
current address in the PC and at the current privilege level. If any register (such as the PC or SR) is altered
by a BDM command while the processor is halted, the updated value is used when prefetching resumes.
If a
Command Sequence:
Operand Data:
Result Data:
30.5.3.3.8
NOP
Command Formats:
Command Sequence:
Operand Data:
Result Data:
30.5.3.3.9
Reads the selected control register and returns the 32-bit result. Accesses to the processor/memory control
registers are always 32 bits wide, regardless of register width. The second and third words of the command
form a 32-bit address, which the debug module uses to generate a special bus cycle to access the specified
control register. The 12-bit Rc field is the same as that used by the MOVEC instruction.
Freescale Semiconductor
GO
performs no operation and may be used as a null command where required.
15
15
command is issued and the CPU is not halted, the command is ignored.
Resume Execution (
No Operation (
Read Control Register (
0x0
0x0
12
None
The command-complete response (0xFFFF) is returned during the next shift
operation.
12
None
The command-complete response, 0xFFFF (with S cleared), is returned during the
next shift operation.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
11
11
NOP
Figure 30-32.
Figure 30-30.
Figure 30-31.
Figure 30-29.
)
GO
0xC
0x0
NOP
???
)
???
GO
RCREG
NOP
GO
NOP
GO
)
8
8
Command Sequence
Command Sequence
Command Format
Command Format
’CMD COMPLETE’
’CMD COMPLETE’
7
7
NEXT CMD
NEXT CMD
0x0
0x0
4
4
3
3
0x0
0x0
Debug Support
0
0
30-31
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