nt256t64uh4a0f Nanya Techology, nt256t64uh4a0f Datasheet

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nt256t64uh4a0f

Manufacturer Part Number
nt256t64uh4a0f
Description
240pin Unbuffered Ddr2 Sdram Module Based On 32mx16 Ddr2 Sdram
Manufacturer
Nanya Techology
Datasheet
NT256T64UH4A0F / NT256T64UH4A0FY (Green)
256MB: 32M x 64
Unbuffered DDR2 SDRAM DIMM
240pin Unbuffered DDR2 SDRAM MODULE
Based on 32Mx16 DDR2 SDRAM
Features
• JEDEC Standard 240-pin Dual In-Line Memory Module
• 32Mx64 DDR2 Unbuffered DIMM based on 32Mx16 DDR2
• Performance:
• Intended for 200 MHz and 266MHz applications
• Inputs and outputs are SSTL-18 compatible
• V
• SDRAMs have 4 internal banks for concurrent operation
• Differential clock inputs
• Data is read or written on both clock edges
• Bi-directional data strobe with one clock cycle preamble and
Description
NT256T64UH4A0F and NT256T64UH4A0FY are 240-Pin Double Data Rate 2 (DDR2) Synchronous DRAM Unbuffered Dual In-Line
Memory Module (UDIMM), organized as a one-rank 64Mx64 high-speed memory array. Modules use four 32Mx16 DDR2 SDRAMs in
FBGA packages. These DIMMs manufactured using raw cards developed for broad industry use as reference designs. The use of these
common design files minimizes electrical variation between suppliers. All NANYA DDR2 SDRAM DIMMs provide a high-performance,
flexible 8-byte interface in a 5.25” long space-saving footprint.
The DIMM is intended for use in applications operating up to 200 MHz (266MHz) clock speeds and achieves high-speed data transfer
rates of up to 400 MHz (533MHz). Prior to any access operation, the device
programmed into the DIMM by address inputs A0-A13 and I/O inputs BA0 and BA1 using the mode register set cycle.
The DIMM uses serial presence-detect implemented via a serial 2,048-bit EEPROM using a standard IIC protocol. The first 128 bytes of
serial PD data are programmed and locked during module assembly. The remaining 128 bytes are available for use by the customer.
Ordering Information
REV 1.4
08/2006
f
f
t
CK
CK
DQ
one-half clock post-amble
SDRAM
NT256T64UH4A0F-5A
NT256T64UH4A0FY-5A
NT256T64UH4A0F-37B
NT256T64UH4A0FY-37B
DD
DIMM
= V
Clock Frequency
Clock Cycle
DQ Burst Frequency
Speed Sort
DDQ
Part Number
= 1.8Volt ± 0.1
Latency
*
PC2-3200 PC2-4200
200
400
5A
3
5
266MHz (3.7ns @ CL = 4)
200MHz (5ns @ CL = 3)
37B
266
533
3.7
4
MHz
MHz
Unit
ns
Speed
DDR2-400
DDR2-533
1
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
• Address and control signals are fully synchronous to positive
• Programmable Operation:
• Auto Refresh (CBR) and Self Refresh Modes
• Automatic and controlled precharge commands
• 13/10/1 Addressing (row/column/bank)
• 7.8µs Max. Average Periodic Refresh Interval
• Serial Presence Detect
• Gold contacts
• SDRAMs in 84-ball FBGA Package
clock edge
- Device
- Burst Type: Sequential or Interleave
- Burst Length: 4, 8
- Operation: Burst Read and Write
PC2-3200
PC2-4200
latency and burst type/ length/operation type must be
Latency: 3, 4
Organization
32Mx64
Leads
Gold
© NANYA TECHNOLOGY CORP.
Power
1.8V
Green
Green
Note

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nt256t64uh4a0f Summary of contents

Page 1

... Description NT256T64UH4A0F and NT256T64UH4A0FY are 240-Pin Double Data Rate 2 (DDR2) Synchronous DRAM Unbuffered Dual In-Line Memory Module (UDIMM), organized as a one-rank 64Mx64 high-speed memory array. Modules use four 32Mx16 DDR2 SDRAMs in FBGA packages. These DIMMs manufactured using raw cards developed for broad industry use as reference designs. The use of these common design files minimizes electrical variation between suppliers. All NANYA DDR2 SDRAM DIMMs provide a high-performance, flexible 8-byte interface in a 5.25” ...

Page 2

... NT256T64UH4A0F / NT256T64UH4A0FY (Green) 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM Pin Description CK0, Differential Clock Inputs CKE0, CKE1 Clock Enable Row Address Strobe Column Address Strobe Write Enable , Chip Selects A0-A9, A11-A13 Address Inputs A10/AP Column Address Input/Auto-precharge BA0, BA1 SDRAM Bank Address Inputs ...

Page 3

... NT256T64UH4A0F / NT256T64UH4A0FY (Green) 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM Pinout Pin Front Pin Front REF DQ0 DQ1 DQS0 DQ2 DQ3 51 V DDQ ...

Page 4

... NT256T64UH4A0F / NT256T64UH4A0FY (Green) 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM Input/Output Functional Description Symbol Type Polarity Positive CK0, CK1, CK2 (SSTL) Edge Negative , , (SSTL) Edge Active CKE0, CKE1 (SSTL) High Active , (SSTL) Low Active , , (SSTL) Low V Supply REF V Supply DDQ Active ...

Page 5

... NT256T64UH4A0F / NT256T64UH4A0FY (Green) 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM Functional Block Diagram (256MB, 1 Rank, 32Mx16 DDR2 SDRAMs) DQS0 LDQS DM0 LDM DQ0 I/O 0 DQ1 I/O 1 DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 D0 UDQS DM1 UDM DQ8 I/O 8 DQ9 I/O 9 DQ10 I/O 10 DQ11 I/O 11 DQ12 I/O 12 DQ13 I/O 13 DQ14 ...

Page 6

... NT256T64UH4A0F / NT256T64UH4A0FY (Green) 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM Serial Presence Detect -- Part 32Mx64 1 BANK UNBUFFERED DDR2 SDRAM DIMM based on 32Mx16, 4Banks, 8K Refresh, 1.8V DDR2 SDRAMs with SPD Byte Description 0 Number of Serial PD Bytes Written during Production 1 Total Number of Bytes in Serial PD device ...

Page 7

... NT256T64UH4A0F / NT256T64UH4A0FY (Green) 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM Serial Presence Detect -- Part 32Mx64 1 BANK UNBUFFERED DDR2 SDRAM DIMM based on 32Mx16, 4Banks, 8K Refresh, 1.8V DDR2 SDRAMs with SPD Byte Description 42 Min. Auto Refresh Command Cycle Time (t 43 Maximum Clock Cycle Time (t ...

Page 8

... NT256T64UH4A0F / NT256T64UH4A0FY (Green) 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM Absolute Maximum Ratings Symbol Voltage on I/O pins relative to Vss OUT Voltage on VDD supply relative to Vss V DD Voltage on VDDQ supply relative to Vss V DDQ Storage Humidity (without condensation) H STG Operating Temperature (Ambient Storage Temperature (Plastic) ...

Page 9

... NT256T64UH4A0F / NT256T64UH4A0FY (Green) 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM Operating, Standby, and Refresh Currents ° ° 1.8V ± 0.1V (256MB, 1 Rank, 32Mx16 DDR2 SDRAMs) CASE DDQ DD Symbol Parameter/Condition Operating Current: one bank; active/precharge DQ, DM, and DQS inputs changing twice per clock cycle; address DD0 (MIN) ...

Page 10

... NT256T64UH4A0F / NT256T64UH4A0FY (Green) 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM AC Timing Specifications for DDR2 SDRAM Devices Used on Module ( ° ° 1.8V ± 0.1V; V CASE DDQ DD Symbol Parameter t DQ output access time from CK DQS output access time from CK/ DQSCK t CK high-level width ...

Page 11

... NT256T64UH4A0F / NT256T64UH4A0FY (Green) 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM AC Timing Specifications for DDR2 SDRAM Devices Used on Module ( ° ° 1.8V ± 0.1V; V CASE DDQ DD Symbol Parameter t Write recovery time WR t Auto precharge write recovery + precharge time DAL t Internal write to read command delay ...

Page 12

... NT256T64UH4A0F / NT256T64UH4A0FY (Green) 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM Package Dimensions (256MB, 1 Rank, 32Mx16 DDR2 SDRAMs '*+ , - .# / ' , *# + ' & * Device position is only for reference. REV 1.4 08/2006 ! ! ! " 1& NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice. ...

Page 13

... NT256T64UH4A0F / NT256T64UH4A0FY (Green) 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM Revision Log Rev Date 0.1 08/2004 Preliminary Release 1.0 01/2005 Added I values dd 1.1 03/2005 Added DDR2-667 spec. 1.2 11/2005 Remove DDR2-667 spec. Update SPD code 1.3 03/2006 Update Package Dimensions. 1.4 08/2006 Update Package Dimensions. REV 1.4 08/2006 ...

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