p650-06sc PhaseLink Corp., p650-06sc Datasheet - Page 4

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p650-06sc

Manufacturer Part Number
p650-06sc
Description
Network Lan Clock
Manufacturer
PhaseLink Corp.
Datasheet
2. AC Specifications
3. DC Specifications
*: Output strengths are doubled (i.e. min. CMOS level is 70mA, typ. CMOS level is 80mA) on pin 6 (output for 75MHz or 66.6MHz)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 4
Input Frequency
Output Rise Time
Output Fall Time
Duty Cycle
Max. Absolute Jitter
Max. Jitter, cycle to cycle
Operating Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage At
CMOS Level
Operating Supply Current
Short-circuit Current
Nominal output current*
Nominal output current*
Internal pull-up resistor
Internal pull-up resistor
PARAMETERS
PARAMETERS
SYMBOL
V
V
V
V
R
R
V
V
V
V
V
V
I
I
I
I
DD
out
out
DD
OH
OL
OH
S
IH
IH
IH
up
up
IL
IL
IL
For all Tri-level input
For all Tri-level input
For all normal input
For all normal input
I
I
I
No Load
CMOS output level
TTL output level
Pins 5,7
Pin 2
OH
OL
OH
= 25mA
= -25mA
= -8mA
0.8V to 2.0V with no load
2.0V to 0.8V with no load
@ 50% V
Short term
CONDITIONS
CONDITIONS
DD
V
V
MIN.
DD
DD
2.97
2.4
35
20
2
-0.5
-0.4
MIN.
10
45
Network LAN Clock
V
V
TYP.
±50
120
DD
DD
35
40
25
60
TYP.
±150
/2
/2
25
50
PLL650-06
V
DD
MAX.
3.63
0.5
0.8
0.4
MAX.
/2 - 1
1.5
1.5
27
55
80
UNITS
UNITS
MHz
mA
mA
mA
mA
kΩ
kΩ
ns
ns
ps
ps
%
V
V
V
V
V
V
V
V
V
V

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