MC74HCT574ADTR2 ON Semiconductor, MC74HCT574ADTR2 Datasheet - Page 7
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MC74HCT574ADTR2
Manufacturer Part Number
MC74HCT574ADTR2
Description
IC FLIP FLOP OCT D 3ST 20-TSSOP
Manufacturer
ON Semiconductor
Series
74HCTr
Type
D-Type Busr
Datasheet
1.MC74HCT574ADTR2G.pdf
(7 pages)
Specifications of MC74HCT574ADTR2
Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
30MHz
Delay Time - Propagation
30ns
Trigger Type
Positive Edge
Current - Output High, Low
6mA, 6mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Email: orderlit@onsemi.com
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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0.15 (0.006) T
0.15 (0.006) T
L
2X
−T−
U
PIN 1
IDENT
U
L/2
C
0.100 (0.004)
S
S
SEATING
PLANE
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
20
1
D
20X
−V−
0.10 (0.004)
A
K
REF
G
20 PIN PLASTIC TSSOP PACKAGE
H
M
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
PACKAGE DIMENSIONS
10
11
T
U
http://onsemi.com
MC74HCT574A
−U−
CASE 948E−02
S
B
DT SUFFIX
TSSOP−20
ISSUE B
V
S
7
J J1
N
N
DETAIL E
Í Í Í Í
Í Í Í Í
Í Í Í Í
SECTION N−N
DETAIL E
F
K1
0.25 (0.010)
K
M
−W−
NOTES:
1. DIMENSIONING AND TOLERANCING
2. CONTROLLING DIMENSION:
3. DIMENSION A DOES NOT INCLUDE
4. DIMENSION B DOES NOT INCLUDE
5. DIMENSION K DOES NOT INCLUDE
6. TERMINAL NUMBERS ARE SHOWN FOR
7. DIMENSION A AND B ARE TO BE
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
PER ANSI Y14.5M, 1982.
MILLIMETER.
MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH OR GATE BURRS
SHALL NOT EXCEED 0.15 (0.006) PER
SIDE.
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER
SIDE.
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
REFERENCE ONLY.
DETERMINED AT DATUM PLANE −W−.
DIM
K1
J1
A
B
C
D
G
H
K
M
F
J
L
MILLIMETERS
MIN
6.40
4.30
0.05
0.50
0.27
0.09
0.09
0.19
0.19
−−−
0
0.65 BSC
6.40 BSC
_
MAX
6.60
4.50
1.20
0.15
0.75
0.37
0.20
0.16
0.30
0.25
8
_
MC74HCT574A/D
0.252
0.169
0.002
0.020
0.011
0.004
0.004
0.007
0.007
MIN
−−−
0
0.026 BSC
0.252 BSC
_
INCHES
0.260
0.177
0.047
0.006
0.030
0.015
0.008
0.006
0.012
0.010
MAX
8
_