s908ey16g2vfar Freescale Semiconductor, Inc, s908ey16g2vfar Datasheet - Page 129

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s908ey16g2vfar

Manufacturer Part Number
s908ey16g2vfar
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
DDRD[1:0] — Data Direction Register D Bits
Figure 12-12
When bit DDRDx is a 1, reading address $0003 reads the PTDx data latch. When bit DDRDx is a 0,
reading address $0003 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Freescale Semiconductor
These read/write bits control port D data direction. Reset clears DDRD[1:0], configuring all port D pins
as inputs.
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
DDRD
Address:
shows the port D I/O logic.
Bit
Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1.
Reset:
Read:
Write:
0
1
READ DDRD ($0007)
WRITE DDRD ($0007)
WRITE PTD ($0003)
READ PTD ($0003)
$0007
PTD
Bit 7
Bit
X
X
0
0
Figure 12-11. Data Direction Register D (DDRD)
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
= Unimplemented
Input, Hi-Z
I/O Pin
Output
Mode
6
0
0
Table 12-4. Port D Pin Functions
RESET
Figure 12-12. Port D I/O Circuit
5
0
0
Accesses to DDRD
Table 12-4
NOTE
Read/Write
DDRDx
DDRD[1:0]
DDRD[1:0]
PTDx
4
0
0
summarizes the operation of the port D pins.
3
0
0
PTD[1:0]
2
0
0
Read
Pin
Accesses to PTD
DDRD1
1
0
PTD[1:0]
PTD[1:0]
Write
DDRD0
Bit 0
PTDx
0
(1)
Port D
129

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