ad7011 Analog Devices, Inc., ad7011 Datasheet
ad7011
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ad7011 Summary of contents
Page 1
... The AD7011 generates differential analog outputs for both the I and Q signals necessity for all digital mobile systems to use the lowest possible power, the device has transmit and receive power-down options. The AD7011 is housed in a space efficient 24-pin SSOP (Shrink Small Outline Package). FUNCTIONAL BLOCK DIAGRAM V ...
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... Measured while the digital inputs to the transmit interface are static and equal Specifications subject to change without notice 10%; Test = AGND = DGND = 0 V; Digital Mode All specifications are T DD AD7011ARS REF REF +V /2 REF 0.875 7 ...
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... Figure 1. Analog Output Test Load Circuit = 10%; AGND = DGND = 0 V. All specifications are – + Figure 3. Load Circuit for Digital Outputs –3– AD7011 40k to T unless MIN MAX Units Description ns min MCLK Cycle Time ns min MCLK High Time ...
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... AD7011 TRANSMIT SECTION TIMING Parameter Limit – + – 4097t + – 64t 32t 32t 124t 7. 30t ...
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... Table II. MODE 2 MCLK 0 3.1104 MHz 0 2.56 MHz –5– AD7011 to T unless MIN MAX Description MCLK Rising Edge to FRAME Setup Time. MCLK Rising Edge to FRAME Hold Time. FRAME Cycle Time. MCLK Rising Edge to Data Setup Time. MCLK Rising Edge to Data Hold Time. ...
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... Package Description Shrink Small Outline Package SSOP PIN CONFIGURATION 1 24 POWER BOUT 23 BIN (QDATA) 2 AGND TxCLK (FRAME QTx TxDATA (IDATA QTx DD AD7011 V DGND TOP VIEW MCLK 7 18 AGND (Not to Scale ITx 9 ITx MODE1 AGND ...
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... BOUT Burst Out, digital output. This is the BIN input delayed by the pipeline delay, both digital and analog, of the AD7011. This can be used to turn on and off the RF amplifiers in synchronization with the I and Q waveforms. 1 POWER Transmit sleep mode, digital input. When this goes low, the AD7011 goes into sleep mode, drawing minimal current. When this pin goes high, the AD7011 is brought out of sleep mode and initiates a self-calibration routine to eliminate the offset between ITx & ...
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... The is the gain matching between the I and Q outputs, measured when transmitting all zeros. Offset Vector Magnitude This is a measure of the offset vector introduced by the AD7011 as illustrated in Figure 8. The offset vector is calculated minimize the rms error vector for each of the constellation points ...
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... CIRCUIT DESCRIPTION TRANSMIT SECTION The transmit section of the AD7011 generates /4 DQPSK I and Q waveforms in accordance with TIA specification. This is accomplished by a digital /4 DQPSK modulator, which includes the root-raised cosine filters ( = 0.35), followed by two 10-bit DACs and on-chip reconstruction filters. The /4 DQPSK (Differential Quadrature Phase Shift Keying) digital modulator generates 10-bit I and Q data in response to the transmit data stream ...
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... MCLK cycles. TxCLK can be used to clock out the transmit data from the ASIC or DSP on the rising edge of TxCLK and the AD7011 will latch TxDATA on the falling edge of TxCLK. When BIN is brought low, the AD7011 will continue to clock in the current Di-bit symbol ( further 8 TxCLK cycles (four symbols) ...
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... Figure 16. Reconstruction Filter Frequency Response for the I and Q DACs, MCLK = 3.1104 MHz 0.4 0.4 0.8 0.8 1.2 1.2 Figure 17. AD7011 I vs. Q Waveforms Filtered by an Ideal Root Raised Cosine Receive Filter 0.4 0.8 1.2 Figure 18. AD7011 Constellation Diagram When Filtered by an Ideal Root Raised Cosine Receive Filter –11– AD7011 0 0 ...
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... AD7011 PIN 1 0.008 (0.203) 0.002 (0.050) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 24-Lead SSOP (RS-24 0.212 (5.38) 0.205 (5.207) 0.311 (7.9) 0.301 (7.64 0.07 (1.78) 0.328 (8.33) 0.318 (8.08) 0.066 (1.67) 8° 0° 0.0256 (0.65) 0.009 (0.229) BSC 0.005 (0.127) 1. LEAD NO. 1 IDENTIFIED BY A DOT. 2. LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS – ...