ics85411 Integrated Device Technology, ics85411 Datasheet - Page 9
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ics85411
Manufacturer Part Number
ics85411
Description
The Idt85411 Is A Low Skew, High Performance 1-to-2 Differential-to-lvds Fanout Buffer And A Member Of The Hiperclocks? Family Of High Performance Clock Solutions From Idt. The Clk, Nclk Pair Can Accept Most Standard Differential Input Levels.the
Manufacturer
Integrated Device Technology
Datasheet
1.ICS85411.pdf
(16 pages)
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IDT
F
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
V
examples for the HiPerClockS CLK/nCLK input driven by the most
common driver types. The input interfaces suggested here are
F
F
IGURE
PP
IGURE
IGURE
ICS85411
LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER
IFFERENTIAL
™
and V
3.3V
/ ICS
R5,R6 locate near the driver pin.
3.3V
LVPECL
2C. H
2A. H
2E. H
™
CMR
1.8V
DIFFERENTIAL-TO-LVDS FANOUT BUFFER
LVPECL
R5
100 - 200
input requirements. Figures 2A to 2E show interface
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V LVPECL D
IDT H
3.3V LVPECL D
I
I
P
I
P
P
C
ER
ER
ER
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
R6
100 - 200
C
Zo = 50 Ohm
Zo = 50 Ohm
C
I
C
P
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
LOCK
ER
C
I
NPUT
S CLK/nCLK I
LOCK
S CLK/nCLK I
S CLK/nCLK I
RIVER
S LVHSTL D
RIVER WITH
R1
50
3.3V
R3
125
C1
C2
I
NTERFACE
R1
84
3.3V
R3
125
R2
50
R4
125
SWING
R1
84
R2
84
and V
R4
125
CLK
nCLK
NPUT
R2
84
AC C
NPUT
NPUT
CLK
nCLK
3.3V
3.3V
RIVER
HiPerClockS
Input
OH
HiPerClockS
Input
D
D
D
OUPLE
CLK
nCLK
must meet the
RIVEN BY
RIVEN BY
RIVEN BY
3.3V
HiPerClockS
Input
9
examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example in Figure 2A, the input termination applies for IDT
HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver
from another vendor, use their termination recommendation.
F
F
IGURE
IGURE
3.3V
3.3V
2D. H
2B. H
LVDS_Driv er
LVPECL
3.3V LVPECL D
3.3V LVDS D
I
I
P
P
ER
ER
Zo = 50 Ohm
Zo = 50 Ohm
C
C
LOCK
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
S CLK/nCLK I
S CLK/nCLK I
ICS85411AM REV. C JANUARY 17, 2007
RIVER
R1
50
RIVER
R3
50
R2
50
R1
100
CLK
nCLK
3.3V
NPUT
NPUT
HiPerClockS
Input
CLK
nCLK
D
D
3.3V
RIVEN BY
RIVEN BY
Receiv er