ics1893ck-40 Integrated Device Technology, ics1893ck-40 Datasheet - Page 83
ics1893ck-40
Manufacturer Part Number
ics1893ck-40
Description
3.3-v 10base-t/100base-tx Integrated Phyceiver
Manufacturer
Integrated Device Technology
Datasheet
1.ICS1893CK-40.pdf
(121 pages)
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7.14.6 Twisted Pair Tri-State Enable, TPTRI (bit 19.7)
7.14.7 ICS Reserved (bits 19.6:1)
7.14.8 Automatic 100Base-TX Power-Down (bit 19.0)
ICS1893CK-40, Rev. C, 06/02/09
The ICS1893CK-40 provides a Twisted Pair Tri-State Enable bit. This bit forces the TP_TXP and TP_TXN
signals to a high-impedance state. When this bit is set to logic:
•
•
See
The Automatic 100Base-TX Power Down bit provides an STA with the means of enabling the
ICS1893CK-40 to automatically shut down 100Base-TX support functions when 10Base-T operations are
being used. When this bit is set to logic:
•
•
Note:
Zero, the Twisted Pair Interface is operational.
One, the Twisted Pair Interface is tri-stated.
Zero, the 100Base-TX Transceiver does not power down automatically in 100Base-TX mode.
One, and the ICS1893CK-40 is operating in 10Base-T mode, the 100Base-TX Transceiver automatically
turns off to reduce the overall power consumption of the ICS1893CK-40.
Section 7.11.2, “ICS Reserved (bits
cross
AMDIX_EN [19:9]
MDI_MODE [19:8] MDIO register 13h bit 8
There are other means of powering down the 100Base-TX Transceiver (for example, when the
entire device is isolated using bit 0:10).
ICS1893CK-40 Data Sheet Rev. C - Release
transmit = TP_BP & TP_BN
receive = TP_AP & TP_AN
MDIO register 13h bit 9
Copyright © 2009, Integrated Device Technology, Inc.
16.14:11)”, the text for which also applies here.
All rights reserved.
83
Chapter 7 Management Register Set
June 2009
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