ics1893cy-10 Integrated Device Technology, ics1893cy-10 Datasheet - Page 139
ics1893cy-10
Manufacturer Part Number
ics1893cy-10
Description
3.3-v 10base-t/100base-tx Integrated Phyceiver
Manufacturer
Integrated Device Technology
Datasheet
1.ICS1893CY-10.pdf
(143 pages)
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9.5.22 Auto-Negotiation Fast Link Pulse Timing
ICS1893CY-10 Rev 1/07
Differential
Twisted Pair
Transmit Signal
Differential
Twisted Pair
Transmit Signal
Table 9-29
time periods consist of timings of signals on the following pins:
•
•
Figure 9-23
TP_TXN.
Table 9-29. Auto-Negotiation Fast Link Pulse Timing
Figure 9-23. Auto-Negotiation Fast Link Pulse Timing Diagram
Period
Time
TP_TXP
TP_TXN
t1
t2
t3
t4
t5
t6
ICS1893CY-10 Data Sheet - Release
Clock/Data Pulse Width
Clock Pulse-to-Data Pulse Timing
Clock Pulse-to-Clock Pulse Timing
Fast Link Pulse Burst Width
Fast Link Pulse Burst to Fast Link Pulse Burst
Number of Clock/Data Pulses in a Burst
lists the significant time periods for the ICS1893CY-10 Auto-Negotiation Fast Link Pulse. The
shows the timing diagram for one pair of these differential signals, for example TP_TXP minus
FLP Burst
Clock
Pulse
t1
t4
Copyright © 2007, Integrated Device Technology, Inc.
Parameter
t2
All rights reserved.
t5
140
Data
Pulse
t1
Conditions
t3
–
–
–
–
–
–
Chapter 9 DC and AC Operating Conditions
FLP Burst
Min.
110
55
10
15
–
–
Typ.
125
90
60
15
20
5
Clock
Pulse
Max.
140
70
25
30
–
–
pulses
Units
ms
ms
ns
µ s
µ s
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