ics1893cy-10 Integrated Device Technology, ics1893cy-10 Datasheet - Page 95
ics1893cy-10
Manufacturer Part Number
ics1893cy-10
Description
3.3-v 10base-t/100base-tx Integrated Phyceiver
Manufacturer
Integrated Device Technology
Datasheet
1.ICS1893CY-10.pdf
(143 pages)
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7.14 Register 19: Extended Control Register 2
ICS1893CY-10 Rev 1/07
The Extended Control Register provides more refined control of the internal ICS1893CY-10 operations.
Note:
1. For an explanation of acronyms used in
2. During any write operation to any bit in this register, the STA must write the default value to all
Table 7-21. Extended Control Register (register [0x13])
•
19.15 Node Mode
19.14 Hardware/Software
19.13 Remote Fault
19.12 ICS reserved
19.11
19.10 ICS reserved
19.9
19.8
19.7
19.6
19.5
19.4
19.3
19.2
19.1
19.0
Bit
† The default is the state of this pin at reset.
ICS1893CY-10 - Release
Reserved bits.
Mode
ICS reserved
AMDIX_EN
MDI_MODE
Twisted Pair Tri-State
Enable, TPTRI
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
Automatic 100Base-TX
Power Down
Definition
Copyright © 2007, Integrated Device Technology, Inc.
Node mode
Hardware mode
No faults detected
Read unspecified
Read unspecified
Read unspecified
See Table 7-22
See Table 7-22
Twisted Pair Signals
are not Tri-Stated or
No effect
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Do not automatically
power down
When Bit = 0
All rights reserved.
Table
95
7-20, see
Repeater mode
Software mode
Remote fault
detected
Read unspecified
Read unspecified
Read unspecified
See Table 7-22
See Table 7-22
Twisted Pair
Signals are
Tri-Stated
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Power down
automatically
When Bit = 1
Chapter 1, “Abbreviations and
Chapter 7 Management Register Set
cess
RW
Ac-
RO
RO
RO
RW
RO
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
SF
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Acronyms”.
fault
De-
1
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
Hex
4
2
0
1
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