icssstvf16859 Broadcom Corp., icssstvf16859 Datasheet

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icssstvf16859

Manufacturer Part Number
icssstvf16859
Description
Ddr 13-bit To 26-bit Registered Buffer
Manufacturer
Broadcom Corp.
Datasheet

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Part Number:
icssstvf16859AKLF
Manufacturer:
ICS
Quantity:
20 000
Part Number:
icssstvf16859BG
Manufacturer:
ICS
Quantity:
20 000
DDR 13-Bit to 26-Bit Registered Buffer
Recommended Applications:
• DDR Memory Modules:
• Provides complete DDR DIMM logic solution with
• SSTL_2 compatible data registers
Product Features:
• Differential clock signals
• Meets SSTL_2 signal data
• Supports SSTL_2 class I specifications on outputs
• Low-voltage operation
• Available in 64 pin TSSOP and 56 pin MLF packages
Truth Table
Notes:
1.
2.
Block Diagram
RESET#
0776—03/18/03
ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.
ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.
R
VREF
CLK#
- DDRI (PC1600, PC2100)
- DDR333 (PC2700)
- DDRI-400 (PC3200)
ICS93V857 or ICS95V857
- V
E
CLK
S
H
H
H
L
D1
DD
E
T
H = "High" Signal Level
L = "Low" Signal Level
X = Don't Care
Output level before the indicated steady state
input conditions were established.
#
= 2.3V to 2.7V
= Transition "Low"-to-"High"
= Transition "High"-to-"Low"
F
L
o l
C
X
Integrated
Circuit
Systems, Inc.
r o
t a
L
1
r o
K
n i
H
n I
g
p
u
To 12 Other Channels
s t
F
C
L
o l
X
L
r o
t a
K
r o
n i
H
#
g
D1
R
F
CLK
o l
X
t a
X
D
H
L
r o
n i
g
Q
O
Q
u
Q
H
L
L
0
p t
) 2 (
u
s t
Q1A
Q1B
VDDQ
Q13B
Q12B
Q11B
Q10B
Q7A
Q6A
Q5A
Q4A
Q3A
Q2A
Q1A
Q9B
Q8B
14
1
VDDQ
VDDQ
VDDQ
Q13A
Q12A
Q11A
Q10A
Q13B
Q12B
Q11B
Q10B
15
GND
GND
GND
56
Q9A
Q8A
Q7A
Q6A
Q5A
Q4A
Q3A
Q2A
Q1A
Q9B
Q8B
Q7B
Q6B
Q5B
Q4B
Q3B
Q2B
Q1B
56-Pin VFQFN (MLF2)
6.10 mm. Body, 0.50 mm. pitch
Pin Configurations
ICSSSTVF16859
Advance Information
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64-Pin TSSOP
1
2
3
4
5
6
7
8
9
ICSSSTVF16859
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
VDDQ
GND
D13
D12
VDD
VDDQ
GND
D11
D10
D9
GND
D8
D7
RESET#
GND
CLK#
CLK
VDDQ
VDD
VREF
D6
GND
D5
D4
D3
GND
VDDQ
VDD
D2
D1
GND
VDDQ
43
28
42
29
D10
D9
D8
D7
RESET#
GND
CLK#
CLK
VDDQ
VDD
VREF
D6
D5
D4

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icssstvf16859 Summary of contents

Page 1

... GND 26 39 GND VDDQ 27 38 VDDQ Q5B 28 37 VDD Q4B Q3B Q2B 31 34 GND Q1B 32 33 VDDQ 64-Pin TSSOP 6.10 mm. Body, 0.50 mm. pitch 43 56 ICSSSTVF16859 15 28 56-Pin VFQFN (MLF2) D10 RESET# GND CLK# CLK VDDQ VDD VREF ...

Page 2

... CLK is used to trigger the data flow and CLK# is used to maintain sufficient noise margins where as RESET#, an LVCMOS asynchronous signal, is intended for use at the time of power-up only. ICSSSTVF16859 supports low- power standby operation. A logic level “Low” at RESET# assures that all internal registers and outputs (Q) are reset to the logic “ ...

Page 3

... RESET# 0.97 CLK, CLK# 0.36 (V /2) - 0.2 DDQ 0 3 ICSSSTVF16859 Advance Information Notes: 1. The input and output negative voltage ratings may be excluded if the input and output clamp ratings are observed. 2. This current will flow only when the output is in the high state level V >V . ...

Page 4

... ICSSSTVF16859 Advance Information Recommended Operating Conditions - DDRI-400 (PC3200) DESCRIPTION PARAMETER Supply Voltage V DD I/O Supply Voltage V DDQ Reference Voltage V REF Termination Voltage Input Voltage Input High Voltage IH (DC Input High Voltage IH (AC Input Low Voltage IL (DC Input Low Voltage ...

Page 5

... V or GND IH(AC) IL(AC IH(AC) IL(AC IH(AC) IL (AC) = -16mA 2.3V-2.7V = 16mA 2.3V-2.7V = 20mA 25° ±350mV REF = 1.25V 360mV I(PP) 5 ICSSSTVF16859 Advance Information V MIN TYP MAX DDQ 2.3V -1 DDQ 0.2 2.3V 1.95 0.2 2.3V 0.35 2.7V ± 2.5V 4 2.5 3.5 2.5V 2.5 3.5 UNITS V µA µA mA µ/clock MHz µ ...

Page 6

... ICSSSTVF16859 Advance Information DC Electrical Characteristics - DDRI-400 (PC3200 70° 2.5 +/-0.2V DDQ SYMBOL PARAMETERS All Inputs Standby (Static) RESET# = GND Operating (Static) RESET RESET Dynamic operating V I (clock only) CLK and CLK# switching 50% duty cycle ...

Page 7

... Data before CLK , CLK# 3 & & 4 Data after CLK , CLK# 3 & 4 1V/ns. 0.5V/ns and < 1V/ns. 1V/ns 2.5V ±0.2V DD (Output) MIN 210 Q 1 2.6V ±0.1V DD (Output) MIN 210 Q 1 ICSSSTVF16859 Advance Information V = 2.5V ± 0.2V DDQ UNITS MIN MAX 270 MHz 1 4 V/ns 0.4 ns 0.6 ns 0.4 ns 0.5 ns UNITS TYP MAX MHz 2.1 2.6 ns 2.1 2.6 ns 3.5 ...

Page 8

... ICSSSTVF16859 Advance Information LVCMOS RESET DDQ Input t inact I DD (see note 2) 10% Voltage and Current Waveforms Inputs Active and Inactive Times V Voltage Waveforms - Pulse Duration Voltage Waveforms - Setup and Hold Times Figure 1 - Parameter Measurement Information (V Notes incluces probe and jig capacitance. ...

Page 9

... Pattern Number ( digit number for parts with ROM code patterns) Package Type G = TSSOP Revision Designator (will not correlate with datasheet revision) Device Type (consists digit numbers) Prefix ICS Standard Device 9 ICSSSTVF16859 Advance Information In Millimeters In Inches MIN MAX MIN -- 1 ...

Page 10

... ICSSSTVF16859 Advance Information 56 pin MLF2 Ordering Information ICSSSTVF16859yK Example: ICS XXXX PPP - T Designation for tape and reel packaging Pattern Number ( digit number for parts with ROM code patterns) Package Type Revision Designator (will not correlate with datasheet revision) Device Type (consists digit numbers) Prefix 0776— ...

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