pc87307 National Semiconductor Corporation, pc87307 Datasheet - Page 213

• Manufacturer Part Number: pc87307
• Description: Plug And Play Compatible And Pc97 Compliant Superi/o
• Manufacturer: National Semiconductor Corporation

11-bit address mode
16-bit address mode
ABGDH and ABGDL
ADDR
AFIFO
APC
APCR1 and APCR2
APSR
ASCR
ASK-IR
BGDH and BGDL
BSR
CCR
CFIFO
CNFGA and CNFGB
Glossary
In this mode, the part decodes address lines A0-
A10, A11-A15 are masked to 1, and UART2 is a
fully featured 16550 UART. The mode is configured
during reset, via CFG0 strap pin.
In this mode, the part decodes address lines A0-
A15
SIN2/SOUT2 interface signals only. The mode is
configured during reset, via CFG0 strap pin.
Alternate Baud rate Generator Divisor register
(High and Low bytes) for UART2. (Logical device 5,
bank 2, offsets 01h and 00h, respectively.)
Address Register of the parallel port in EPP
modes. (Logical device 4, offset 03h.)
Address FIFO for the parallel port in Extended Ca-
pabilities Port (ECP) mode 011. (Logical device 4,
offset 000h.)
Advanced Power Control.
APC control registers 1 and 2. (Logical device 2,
offsets 40h and 41h, respectively.)
Advanced Power Control (APC) status register.
(Logical device 2, offset 42h.)
Auxiliary Status and Control Register for UART2 in
Extended operation modes. (Logical device 5, bank
0, offset 07h.)
Amplitude Shift Keying Infrared.
Baud rate Generator Divisor buffer (High and Low
bytes) for UART2. (Logical devices 5, bank 1, off-
sets 01h and 00h, respectively.)
Bank Selection Register for UART2, when enabled,
i.e., when bit 7 of this register is 1. (Logical device
5, all banks, offset 03h.)
Configuration Control Register of the Floppy Disk
Controller (FDC) for write operations. (Logical de-
vice 3, offset 07h.)
Parallel port data FIFO in Extended Capabilities
Port (ECP) mode 010. (Logical device 4, offset
400h.)
Configuration registers A and B for the parallel port
in Extended Capabilities Port (ECP) mode 111.
(Logical device 4, offsets 400h and 401h, respec-
tively.)
and
UART2
is
a
16550
UART
with
Glossary
213
Confg0
Consumer Remote Control Mode
Control0, Control2 and Control4
CSN
CRA, CRB, CRC, CRD
CTR
DASK-IR
Data
DATA0, DATA1, DATA2 and DATA3
DATAR
DCR
Device
DFIFO
DID
DIR
DOR
See PP Confg0.
This UART mode supports all four protocols cur-
rently used in remote-controlled home entertain-
ment equipment. Also called TV-Remote mode.
Internal configuration registers of the parallel port in
Extended Capabilities Port (ECP) modes. (Logical
device 4, second level offsets 00h, 02h and 04h.)
Card Select Number register - an 8-bit register with
a unique value that identifies an ISA card.
Control Registers of the Real-Time Clock (RTC).
(Logical device 2, offsets 0Ah, 0Bh, 0Ch and 0Dh,
respectively.)
Control Register of the parallel port in SPP modes.
(Logical device 4, offset 02h.)
Digital Amplitude Shift Keying Infrared.
The Data register contains the data in the register
indicated by the corresponding Index register.
Data Registers of the parallel port in EPP modes.
(Logical device 4, offsets 04h, 05h, 06h and 07h,
respectively.)
Data Register for the parallel port in Extended Ca-
pability Port (ECP) modes 000 and 001. (Logical
device 4, offset 000h.)
Data Control Register for the parallel port in Ex-
tended Capabilities Port (ECP) modes. (Logical de-
vice 4, offset 002h.)
Any circuit that performs a specific function, such
as a parallel port.
ECP Data FIFO in Extended Capabilities Port
(ECP) mode 011. (Logical device 4, offset 400h.)
Device ID register for UART2. (Logical device 5,
bank 3, offset 00h.)
Digital Input Register of the Floppy Disk Controller
(FDC) for read operations. (Logical device 3, offset
07h.)
Digital Output Register of the Floppy Disk Control-
ler (FDC). (Logical device 3, offset 2h.)
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