mc74hc4053dw ON Semiconductor, mc74hc4053dw Datasheet
mc74hc4053dw
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mc74hc4053dw Summary of contents
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This document, MC74HC4051/D has been canceled and replaced by MC74HC4051A/D LAN was sent 9/28/01 ...
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High–Performance Silicon–Gate CMOS The MC54/74HC4051, MC74HC4052 and MC54/74HC4053 utilize sili- con–gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. These analog multiplexers/ demultiplexers control analog voltages that may vary across the complete power ...
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LOGIC DIAGRAM MC74HC4052 Double–Pole, 4–Position Plus Common Off LOGIC DIAGRAM MC54/74HC4053 Triple Single–Pole, Double–Position Plus Common Off NOTE: This device allows independent control of each switch. Channel–Select Input A controls the X–Switch, Input B controls the Y–Switch and Input C ...
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MAXIMUM RATINGS* Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...
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DC CHARACTERISTICS — Digital Section Symbol Parameter V Minimum High–Level Input Voltage, IH Channel–Select or Enable Inputs V Maximum Low–Level Input Voltage, IL Channel–Select or Enable Inputs I Maximum Input Leakage Current, in Channel–Select or Enable Inputs I Maximum Quiescent ...
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AC CHARACTERISTICS ( pF, Input t L Symbol t , Maximum Propagation Delay, Channel–Select to Analog Output PLH t (Figure 9) PHL t , Maximum Propagation Delay, Analog Input to Analog Output PLH t (Figure 10) PHL t ...
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ADDITIONAL APPLICATION CHARACTERISTICS Symbol Parameter BW Maximum On–Channel Bandwidth or Minimum Frequency Response (Figure 6) — Off–Channel Feedthrough Isolation (Figure 7) — Feedthrough Noise. Channel–Select Input to Common I/O (Figure 8) — Crosstalk Between Any Two ...
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Figure 1a. Typical On Resistance, V Figure 1c. Typical On Resistance, V Figure 1e. Typical On Resistance, V – 2.0 V Figure 1b. Typical On Resistance – 6.0 V Figure 1d. Typical On ...
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Figure 3. Maximum Off Channel Leakage Current, Any One Channel, Test Set–Up Figure 5. Maximum On Channel Leakage Current, Channel to Channel, Test Set–Up *Includes all probe and jig capacitance Figure 7. Off Channel Feedthrough Isolation, Test Set–Up Figure 4. ...
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Figure 9a. Propagation Delays, Channel Select to Analog Out Figure 10a. Propagation Delays, Analog In to Analog Out Figure 11a. Propagation Delays, Enable to Analog Out *Includes all probe and jig capacitance Figure 9b. Propagation Delay, Test Set–Up Channel Select ...
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Figure 12. Crosstalk Between Any Two Switches, Test Set–Up *Includes all probe and jig capacitance Figure 14a. Total Harmonic Distortion, Test Set–Up The Channel Select and Enable control pins should ...
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Figure 15. Application Example a. Using Pull–Up Resistors Figure 17. Interfacing LSTTL/NMOS to CMOS Inputs Figure 18. Function Diagram, HC4051 Figure 16. External Germanium or Schottky Clipping Diodes b. Using HCT Interface ...
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Figure 19. Function Diagram, HC4052 Figure 20. Function Diagram, HC4053 ...
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–A – –T – –A – –B – ...
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D 16X G 14X K K 16X REF 16 L PIN 1 IDENT –V– C –T– D OUTLINE DIMENSIONS DW SUFFIX PLASTIC SOIC PACKAGE CASE 751G–02 ISSUE ...
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... Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800–282–9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2700 Email: r14525@onsemi ...