hd74alvch16334 Renesas Electronics Corporation., hd74alvch16334 Datasheet
hd74alvch16334
Related parts for hd74alvch16334
hd74alvch16334 Summary of contents
Page 1
... Universal Bus Driver with 3-state Outputs Description This HD74ALVCH16334 is a 16-bit universal bus driver is designed for 2 3 Data flow from controlled by the output enable (O E) input. The device operates in the transparent mode when the latch enable (LE) input is low. When LE is high, the A data is latched if the clock (CLK) input is held at a high or low logic level ...
Page 2
... HD74ALVCH16334 Function Table Inputs High level L : Low level X : Immaterial Z : High impedance : Low to high transition Note: 1. Output level before the indicated steady state input conditions were established. 2 CLK Output Y ...
Page 3
... GND Y10 14 GND 15 Y11 16 17 Y12 Y13 19 Y14 20 GND 21 22 Y15 Y16 HD74ALVCH16334 CLK GND GND A10 34 GND 33 A11 32 A12 ...
Page 4
... HD74ALVCH16334 Absolute Maximum Ratings Item Symbol Supply voltage Input voltage V I *1, 2 Output voltage V O Input clamp current I IK Output clamp current I OK Continuous output current GND current / pin Maximum power dissipation (in still air) ...
Page 5
... Logic Diagram CLK HD74ALVCH16334 CLK To fifteen other channels 5 ...
Page 6
... HD74ALVCH16334 Electrical Characteristics (Ta = –40 to 85°C) Item Symbol V Input voltage V 2.3 to 2.7 IH 2.7 to 3.6 V 2.3 to 2.7 IL 2.7 to 3.6 Output voltage V 2.3 to 3.6 OH 2.3 2.3 2.7 3.0 3.0 V 2.3 to 3.6 OL 2.3 2.3 2.7 3.0 Input current I 3 2.3 IN (hold) 2.3 3.0 3.0 3.6 Off state output current I 3.6 OZ Quiescent supply current I 3 3.0 to 3.6 CC Note: 1. This is the bus hold maximum dynamic current required to switch the input from one state to another ...
Page 7
... HD74ALVCH16334 Unit FROM TO (Input) (Output) MHz CLK Control inputs Data inputs pF Outputs 7 ...
Page 8
... HD74ALVCH16334 Switching Characteristics (Ta = –40 to 85°C) (cont) Item Symbol V Setup time t su Hold time t h Pulse width (V) Min Typ Max CC 2.5 0.2 1.4 — — 2.7 1.7 — — 3.3 0.3 1.5 — — 2.5 0.2 1.2 — — 2.7 1.6 — — 3.3 0.3 1.3 — — 2.5 0.2 1.4 — — 2.7 1.5 — — 3.3 0.3 1.2 — — 2.5 0.2 0.9 — ...
Page 9
... Test Circuit * Note includes probe and jig capacitance. L See under table 500 S1 OPEN GND 500 Load Circuit for Outputs Vcc=2.7V, Symbol Vcc=2.5 0.2V 3.3 0. PLH PHL OPEN OPEN GND GND 6 HD74ALVCH16334 9 ...
Page 10
... HD74ALVCH16334 Waveforms – Input V ref 10 % Output Waveforms – 2 Timing Input V Data Input V Input ref PHL PLH V ref ref ref ref ref ref V IH GND ref GND V IH ...
Page 11
... ref ref TEST ref V ref1 V ref2 V OH1 V OL1 2.0 ns, t 2.0 ns 2.5 0 2.5 ns, t 2.5 ns 2.7 V, 3.3 0 HD74ALVCH16334 V IH GND V OH1 V ref1 ref2 V OL1 Vcc=2.7V, Vcc=2.5 0.2V 3.3 0. 1 +0. +0 –0. –0.3 V ...
Page 12
... HD74ALVCH16334 Package Dimensions +0.3 12.50 –0 0.50 +0.1 0.08 M 0.20 –0.05 0.65 Max 0. 8.10 0.3 Hitachi code EIAJ code JEDEC code Unit : mm 10 Max 0.50 0.1 TTP-48DC — — ...
Page 13
Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise ...