74lvc1g19gw NXP Semiconductors, 74lvc1g19gw Datasheet

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74lvc1g19gw

Manufacturer Part Number
74lvc1g19gw
Description
1-of-2 Decoder/demultiplexer
Manufacturer
NXP Semiconductors
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVC1G19GW
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Part Number:
74lvc1g19gw125
Manufacturer:
NEXPERIA/安世
Quantity:
20 000
1. General description
2. Features
The 74LVC1G19 is a 1-of-2 decoder/demultiplexer with a common output enable. This
device buffers the data on input A and passes it to the outputs 1Y (true) and 2Y
(complement) when the enable (E) input signal is LOW.
Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of
these devices in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
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I
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I
I
I
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74LVC1G19
1-of-2 decoder/demultiplexer
Rev. 04 — 27 August 2007
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
ESD protection:
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C.
N
N
N
N
N
24 mA output drive (V
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V)
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CC
= 3.0 V)
Product data sheet
OFF
. The I
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74lvc1g19gw Summary of contents

Page 1

Rev. 04 — 27 August 2007 1. General description The 74LVC1G19 is a 1-of-2 decoder/demultiplexer with a common output enable. This device buffers the data on input A and passes it to the outputs 1Y (true) and ...

Page 2

... C to +125 C 74LVC1G19GV +125 C 74LVC1G19GM +125 C 74LVC1G19GF +125 C 4. Marking Table 2. Marking Type number 74LVC1G19GW 74LVC1G19GV 74LVC1G19GM 74LVC1G19GF 5. Functional diagram Fig 1. Logic symbol 74LVC1G19_4 Product data sheet Description SC-88 plastic surface-mounted package; 6 leads TSOP6 plastic surface-mounted package (TSOP6); 6 leads XSON6 plastic extremely thin small outline package ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning 74LVC1G19 GND 001aab986 Fig 2. Pin configuration SOT363 and SOT457 6.2 Pin description Table 3. Pin description Symbol A GND Functional description [1] Table 4. Function table Input [ HIGH voltage level ...

Page 4

... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage O I output current ...

Page 5

... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter +85 C amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current ...

Page 6

... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter +125 C amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I power-off leakage current ...

Page 7

... NXP Semiconductors 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter Conditions t propagation delay nY; see power dissipation V = GND capacitance [1] Typical values are measured the same as t and t ...

Page 8

... NXP Semiconductors Table 9. Measurement points Supply voltage 1. 2.7 V 2 3 5.5 V Test data is given in Table 10. Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance Z ...

Page 9

... NXP Semiconductors 13. Package outline Plastic surface-mounted package; 6 leads y 6 pin 1 index DIMENSIONS (mm are the original dimensions UNIT max 0.30 1.1 0.25 mm 0.1 0.20 0.8 0.10 OUTLINE VERSION IEC SOT363 Fig 7. Package outline SOT363 (SC-88) 74LVC1G19_4 Product data sheet scale ...

Page 10

... NXP Semiconductors Plastic surface-mounted package (TSOP6); 6 leads y 6 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT b p 0.1 0.40 1.1 0.26 mm 0.013 0.25 0.9 0.10 OUTLINE VERSION IEC SOT457 Fig 8. Package outline SOT457 (TSOP6) 74LVC1G19_4 Product data sheet scale ...

Page 11

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION ...

Page 12

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 10. Package outline SOT891 (XSON6) ...

Page 13

... NXP Semiconductors 14. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 12. Revision history Document ID Release date 74LVC1G19_4 20070827 • Modifications: In leakage and supply current ...

Page 14

... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...

Page 15

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 14 Abbreviations ...

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