pca85162 NXP Semiconductors, pca85162 Datasheet - Page 17
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pca85162
Manufacturer Part Number
pca85162
Description
Universal Lcd Driver For Low Multiplex Rates
Manufacturer
NXP Semiconductors
Datasheet
1.PCA85162.pdf
(42 pages)
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NXP Semiconductors
PCA85162_1
Product data sheet
7.13 Output bank selector
7.14 Input bank selector
7.15 Blinker
Once the display RAM of the first PCA85162 has been written, the second PCA85162 is
selected by sending the device-select command again. This time however the command
matches the second device's hardware subaddress. Next the load-data-pointer command
is sent to select the preferred display RAM address of the second PCA85162.
This last step is very important because during writing data to the first PCA85162, the data
pointer of the second PCA85162 is incremented. In addition, the hardware subaddress
should not be changed whilst the device is being accessed on the I
The output bank selector (see
address for transfer to the display register. The actual row selected depends on the
particular LCD drive mode in operation and on the instant in the multiplex sequence.
The PCA85162 includes a RAM bank switching feature in the static and 1:2 multiplex
drive modes. In the static drive mode, the bank-select command may request the contents
of row 2 to be selected for display instead of the contents of row 0. In the 1:2 multiplex
mode, the contents of rows 2 and 3 may be selected instead of rows 0 and 1. This gives
the provision for preparing display information in an alternative bank and to be able to
switch to it once it is assembled.
The input bank selector loads display data into the display RAM in accordance with the
selected LCD drive configuration. Display data can be loaded in row 2 in static drive mode
or in rows 2 and 3 in 1:2 multiplex drive mode by using the bank-select command (see
Table
The display blinking capabilities of the PCA85162 are very versatile. The whole display
can blink at frequencies selected by the blink-select command (see
frequencies are fractions of the clock frequency. The ratio between the clock and blink
frequencies depends on the blink mode selected (see
An additional feature is for an arbitrary selection of LCD elements to blink. This applies to
the static and 1:2 multiplex drive modes and can be implemented without any
communication overheads. By means of the output bank selector, the displayed RAM
banks are exchanged with alternate RAM banks at the blink frequency. This mode can
also be specified by the blink-select command.
In the 1:3 and 1:4 multiplex modes, where no alternative RAM bank is available, groups of
LCD elements can blink by selectively changing the display RAM data at fixed time
intervals.
•
•
•
•
In 1:4 multiplex mode, all RAM addresses of row 0 are selected, these are followed by
the contents of row 1, 2, and then 3
In 1:3 multiplex mode, rows 0, 1, and 2 are selected sequentially
In 1:2 multiplex mode, rows 0 and 1 are selected
In static mode, row 0 is selected
13). The input bank selector functions independently to the output bank selector.
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 19 April 2010
Table
13) selects one of the four rows per display RAM
Universal LCD driver for low multiplex rates
Table
6).
2
PCA85162
C-bus interface.
Table
© NXP B.V. 2010. All rights reserved.
14). The blink
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