adv7390 Analog Devices, Inc., adv7390 Datasheet - Page 50
![no-image](/images/no-image-200.jpg)
adv7390
Manufacturer Part Number
adv7390
Description
Low Power, Chip Scale 10-bit Sd/hd Video Encoder
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADV7390.pdf
(96 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
adv7390BCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
adv7390BCPZ-REEL
Manufacturer:
LT
Quantity:
1 000
Company:
Part Number:
adv7390WBCPZ
Manufacturer:
AD
Quantity:
101
ADV7390/ADV7391/ADV7392/ADV7393
ED/HD Sinc Compensation Filter Response
Subaddress 0x33, Bit 3
The ADV739x includes a filter designed to counter the effect of
sinc roll-off in DAC 1, DAC 2, and DAC 3 while operating in
ED/HD mode. This filter is enabled by default. It can be
disabled using Subaddress 0x33, Bit 3. The benefit of the filter is
illustrated in Figure 68 and Figure 69.
ED/HD TEST PATTERN COLOR CONTROLS
Subaddress 0x36 to Subaddress 0x38
Three 8-bit registers at Subaddress 0x36 to Subaddress 0x38
are used to program the output color of the internal ED/HD
test pattern generator (Subaddress 0x31, Bit 2 = 1), whether it
be the lines of the cross hatch pattern or the uniform field test
pattern. They are not functional as color controls for external
pixel data input.
The values for the luma (Y) and color difference (Cr and Cb)
signals used to obtain white, black, and saturated primary and
complementary colors conform to the ITU-R BT.601-4
standard.
–0.1
–0.2
–0.3
–0.4
–0.5
–0.1
–0.2
–0.3
–0.4
–0.5
0.5
0.4
0.3
0.2
0.1
0.5
0.4
0.3
0.2
0.1
0
0
0
0
Figure 69. ED/HD Sinc Compensation Filter Disabled
Figure 68. ED/HD Sinc Compensation Filter Enabled
5
5
10
10
FREQUENCY (MHz)
FREQUENCY (MHz)
15
15
20
20
25
25
30
30
Rev. 0 | Page 50 of 96
Table 40 shows sample color values that can be programmed
into the color registers when the output standard selection is set
to EIA770.2/EIA770.3 (Subaddress 0x30, Bits[1:0] = 00).
Table 40. Sample Color Values for EIA770.2/EIA770.3
ED/HD Output Standard Selection
Sample Color
White
Black
Red
Green
Blue
Yellow
Cyan
Magenta
COLOR SPACE CONVERSION MATRIX
Subaddress 0x03 to Subaddress 0x09
The internal color space conversion (CSC) matrix automatically
performs all color space conversions based on the input mode
programmed in the mode select register (Subaddress 0x01,
Bits[6:4]). Table 41 and Table 42 show the options available in
this matrix.
An SD color space conversion from RGB-in to YPrPb-out is
possible on the ADV7392/ADV7393. An ED/HD color space
conversion from RGB-in to YPrPb-out is not possible.
Table 41. SD Color Space Conversion Options
Input
YCrCb
YCrCb
RGB
RGB
1
2
Table 42. ED/HD Color Space Conversion Options
Input
YCrCb
YCrCb
ED/HD Manual CSC Matrix Adjust Feature
The ED/HD manual CSC matrix adjust feature provides custom
coefficient manipulation for color space conversions and is used
in ED and HD modes only. The ED/HD manual CSC matrix
adjust feature can be enabled using Subaddress 0x02, Bit 3.
Normally, there is no need to enable this feature because the CSC
matrix automatically performs the color space conversion based
on the input mode chosen (ED or HD) and the output color
space selected (see Table 42). For this reason, the ED/HD
manual CSC matrix adjust feature is disabled by default.
CVBS/YC outputs are available for all CSC combinations.
Available on the ADV7392/ADV7393 (40-pin devices) only.
2
2
Output
YPrPb
RGB
YPrPb
RGB
Output
YPrPb
RGB
1
235
16
81
145
41
210
170
106
YPrPb/RGB Out
(Reg. 0x02, Bit 5)
1
0
1
0
Y Value
(0xEB)
(0x10)
(0x51)
(0x91)
(0x29)
(0xD2)
(0xAA)
(0x6A)
YPrPb/RGB Out (Reg. 0x02, Bit 5)
1
0
128
128
240
34
110
146
16
222
Cr Value
(0x80)
(0x80)
(0xF0)
(0x22)
(0x6E)
(0x92)
(0x10)
(0xDE)
RGB In/YCrCb In
(Reg. 0x87, Bit 7)
0
0
1
1
128
128
90
54
240
16
166
202
Cb Value
(0x80)
(0x80)
(0x5A)
(0x36)
(0xF0)
(0x10)
(0xA6)
(0xCA)