adv7390 Analog Devices, Inc., adv7390 Datasheet - Page 85
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adv7390
Manufacturer Part Number
adv7390
Description
Low Power, Chip Scale 10-bit Sd/hd Video Encoder
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADV7390.pdf
(96 pages)
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Table 61. 8-Bit 525i YCrCb In, YPrPb Out
Subaddress
0x17
0x00
0x01
0x80
0x82
0x8A
Table 62. 8-Bit 525i YCrCb In (EAV/SAV), RGB Out
Subaddress
0x17
0x00
0x01
0x02
0x80
0x82
Table 63. 8-Bit 525i YCrCb In, RGB Out
Subaddress
0x17
0x00
0x01
0x02
0x80
0x82
0x8A
Setting
0x02
0x1C
0x00
0x10
0xC9
0x0C
Setting
0x02
0x1C
0x00
0x10
0x10
0xC9
Setting
0x02
0x1C
0x00
0x10
0x10
0xC9
0x0C
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
RGB output enabled. RGB output sync
enabled.
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
RGB output enabled. RGB output sync
enabled.
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
Rev. 0 | Page 85 of 96
Table 64. 10-Bit 525i YCrCb In (EAV/SAV), YPrPb Out
Subaddress
0x17
0x00
0x01
0x80
0x82
0x88
Table 65. 10-Bit 525i YCrCb In, YPrPb Out
Subaddress
0x17
0x00
0x01
0x80
0x82
0x88
0x8A
Table 66. 10-Bit 525i YCrCb In, CVBS/Y-C Out
Subaddress
0x17
0x00
0x01
0x80
0x82
0x88
0x8A
ADV7390/ADV7391/ADV7392/ADV7393
Setting
0x02
0x1C
0x00
0x10
0xC9
0x10
Setting
0x02
0x1C
0x00
0x10
0xC9
0x10
0x0C
Setting
0x02
0x1C
0x00
0x10
0xCB
0x10
0x0C
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
10-bit input enabled.
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
10-bit input enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
Pixel data valid. CVBS/S-Video out. SSAF
PrPb filter enabled. Active video edge
control enabled. Pedestal enabled.
10-bit input enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.