cat5401 Catalyst Semiconductor, cat5401 Datasheet - Page 2

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cat5401

Manufacturer Part Number
cat5401
Description
Quad Digitally Programmable Potentiometers Dpp? With 64 Taps And Spi Interface
Manufacturer
Catalyst Semiconductor
Datasheet

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CAT5401
PIN DESCRIPTIONS
¯¯¯ : Write Protect
¯¯¯ is the Write Protect pin. The Write Protect pin will allow normal read/write operations when held high. When
¯¯¯ is tied low, all non-volatile write operations to the Data registers are inhibited (change of wiper control register
is allowed). WP
already been initiated, WP
HOLD
The HOLD
having to retransmit entire sequence at a later time. To pause, HOLD
SO pin is in a high impedance state during the time the part is paused, and transitions on the SI pins will be
ignored. To resume communication, HOLD
time this function is not being used.) HOLD
Doc. No. MD-2012 Rev. G
WP
WP
WP
¯¯¯¯¯ : Hold
(SOIC)
Pin#
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
¯¯¯¯¯ pin is used to pause transmission to the CAT5401 while in the middle of a serial sequence without
(TSSOP)
¯¯¯ going low while CS
Pin#
19
20
21
22
23
24
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Name
¯¯¯¯¯
HOLD
¯¯¯ going low will have no effect on any write operation.
GND
SCK
R
¯¯¯
¯¯¯
R
R
R
V
R
WP
R
R
R
R
R
NC
R
SO
R
NC
CS
A1
A0
SI
CC
W0
W1
W2
W3
H0
H1
H2
H3
L0
L1
L2
L3
Function
Supply Voltage
Low Reference Terminal
for Potentiometer 0
High Reference Terminal
for Potentiometer 0
Wiper Terminal for
Potentiometer 0
Chip Select
Write Protection
Serial Input
Device Address
Low Reference Terminal
for Potentiometer 1
High Reference Terminal
for Potentiometer 1
Wiper Terminal for
Potentiometer 1
Ground
No Connect
Wiper Terminal for
Potentiometer 2
High Reference Terminal
for Potentiometer 2
Low Reference Terminal
for Potentiometer 2
Bus Serial Clock
Hold
Serial Data Output
Device Address, LSB
Wiper Terminal for
Potentiometer 3
High Reference Terminal
for Potentiometer 3
Low Reference Terminal
for Potentiometer 3
No Connect
¯¯¯ is still low will interrupt a write to the registers. If the internal write cycle has
¯¯¯¯¯ may be tied high directly to V
¯¯¯¯¯ is brought high, while SCK is low. (HOLD
2
SI: Serial Input
SI is the serial data input pin. This pin is used to input all
opcodes, byte addresses and data to be written to the
CAT5401. Input data is latched on the rising edge of the
serial clock.
SO: Serial Output
SO is the serial data output pin. This pin is used to
transfer data out of the CAT5401. During a read cycle,
data is shifted out on the falling edge of the serial
clock.
SCK: Serial Clock
SCK is the serial clock pin. This pin is used to
synchronize
microcontroller and the CAT5401. Opcodes, byte
addresses or data present on the SI pin are latched on
the rising edge of the SCK. Data on the SO pin is
updated on the falling edge of the SCK.
A0, A1: Device Address Inputs
These inputs set the device address when addressing
multiple devices. A total of four devices can be
addressed on a single bus. A match in the slave
address must be made with the address input in order
to initiate communication with the CAT5401.
R
The four sets of R
terminal connections on a mechanical potentiometer.
R
The four R
a mechanical potentiometer.
¯¯¯ : Chip Select
¯¯¯ is the Chip select pin. CS
CAT5401 and CS
high takes the SO output pin to high impedance and
forces the devices into a Standby mode (unless an
internal write operation is underway). The CAT5401
draws ZERO current in the Standby mode. A high to
low transition on CS
being initiated. A low to high transition on CS
valid write sequence is what initiates an internal write
cycle.
CS
CS
H
W
, R
: Wiper
¯¯¯¯¯ must be brought low while SCK is low. The
L
: Resistor End Points
W
pins are equivalent to the wiper terminal of
CC
the
¯¯¯ high disables the CAT5401. CS
or tied to V
¯¯¯ is required prior to any sequence
H
and R
communication
¯¯¯¯¯ should be held high any
Characteristics subject to change without notice
L
CC
pins are equivalent to the
through a resistor.
¯¯¯ low enables the
© Catalyst Semiconductor, Inc.
between
¯¯¯ after a
¯¯¯
the

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