atv2500h-35pi ATMEL Corporation, atv2500h-35pi Datasheet - Page 3

• Manufacturer Part Number: atv2500h-35pi
• Description: High-density Uv-erasable Programmable Logic Device - Atmel Corporation
• Manufacturer: ATMEL Corporation

Functional Logic Diagram Description
The ATV2500H/L Functional Logic Diagram describes the
interconnections between the input, feedback pins and
logic cells. All interconnections are routed through the glo-
bal bus.
The ATV2500H/L is a straightforward and uniform PLD.
The twenty-four macrocells are numbered 0 through 23.
Each macrocell contains 17 AND gates. All AND gates
have 172 inputs. The five lower product terms provide AR1,
CK1, CK2, AR2, and OE. These are: one asynchronous
reset and clock per flip-flop, and an output enable. The top
Absolute Maximum Ratings*
Temperature Under Bias ............................... -55°C to + 125°C
Storage Temperature .................................... -65°C to + 150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
Voltage on Input Pins
with Respect to Ground
During Programming.....................................-2.0V to +14.0V
Programming Voltage with
Respect to Ground .......................................-2.0V to +14.0V
Integrated UV Erase Dose.............................. 7258 W.sec/cm
(1)
(1)
(1)
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twelve product terms are grouped into three sum terms,
which are used as shown in the macrocell diagrams.
Eight synchronous preset terms are distributed in a 2/4 pat-
tern. The first four macrocells share Preset 0, the next two
share Preset 1, and so on, ending with the last two macro-
cells sharing Preset 7.
The fourteen dedicated inputs and their complements use
the numbered positions in the global bus as shown. Each
macrocell provides six inputs to the global bus: (left to right)
flip-flop Q2 true and false, flip-flop Q1 true and false, and
the pin true and false. The positions occupied by these sig-
nals in the global bus are the six numbers in the bus dia-
gram next to each macrocell.
*NOTICE:
Note:
1.
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Minimum voltage is -0.6V dc, which may under-
shoot to -2.0V for pulses of less than 20 ns. Max-
imum output pin voltage is Vcc + 0.75V dc, which
may overshoot to 7.0V for pulses of less than 20
ns.
Stresses beyond those listed under “Absolute
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