adsp-21367kbpz-2a Analog Devices, Inc., adsp-21367kbpz-2a Datasheet

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adsp-21367kbpz-2a

Manufacturer Part Number
adsp-21367kbpz-2a
Description
Sharc Processors
Manufacturer
Analog Devices, Inc.
Datasheet
a
SUMMARY
High performance 32-bit/40-bit floating point processor
Single-instruction, multiple-data (SIMD) computational
On-chip memory—2M bit of on-chip SRAM and 6M bit of on-
SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
optimized for high performance audio processing
architecture
chip mask programmable ROM
S
PROCESSING
ELEMENT
4
(PEX)
8 × 4 × 32
GPIO FLAGS/
DAG1
IRQ/TIMEXP
PROCESSING
8 × 4 × 32
CORE PROCESSOR
ELEMENT
DAG2
(PEY)
PM ADDRESS BUS
DM ADDRESS BUS
SRC (8 CHANNELS)
PRECISION CLOCK
GENERATORS (4)
SPDIF (Rx/Tx)
PX REGISTER
TIMER
DIGITAL AUDIO INTERFACE
SEQUENCER
PROGRAM
32
32
PM DATA BUS
INSTRUCTION
DM DATA BUS
32 × 48-BIT
CACHE
Figure 1. Functional Block Diagram
64
64
ADSP-21367/ADSP-21368/ADSP-21369
SERIAL PORTS (8)
INPUT DATA PORT/
ADDR
DAI PINS
ON-CHIP MEMORY
PDAP
IOA(24)
CONTROL, STATUS, & DATA BUFFERS
4 BLOCK OF
IOP REGISTER (MEMORY MAPPED)
6M BIT ROM
2M BIT RAM
20
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Code compatible with all other members of the SHARC family
The ADSP-21367/ADSP-21368/ADSP-21369 are available
DATA
with a 333 MHz core instruction rate with unique audiocen-
tric peripherals such as the digital audio interface, S/PDIF
transceiver, serial ports, 8-channel asynchronous sample
rate converter, precision clock generators, and more. For
complete ordering information, see
Page
56.
IOD(32)
INTERFACE
SPI PORT (2)
TWO WIRE
DPI PINS
MEMORY INTERFACE
©2006 Analog Devices, Inc. All rights reserved.
SHARED MEMORY
ASYNCHRONOUS
14
SHARC
DIGITAL PERIPHERAL INTERFACE
CONTROLLER
INTERFACE
SDRAM
EXTERNAL PORT
JTAG TEST & EMULATION
CONTROLLER
34 CHANNELS
DMA
FLAGS4-15
I/O PROCESSOR
®
PWM
7
3
8
Ordering Guide on
Processors
MEMORY DMA (2)
www.analog.com
MEMORY-TO-
TIMERS (3)
UART (2)
CONTROL
ADDRESS
18
24
32
DATA

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