dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 88
dsp56800eerm
Manufacturer Part Number
dsp56800eerm
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56800EERM.pdf
(177 pages)
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5.6.5.6
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.5.7
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.6
5.6.6.1
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.6.2
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
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Base + $5
RESET
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
Read
Write
Interrupt Priority Register 5 (IPR5)
Quadrature Decoder 1 INDEX Pulse Interrupt Priority Level (DEC1_XIRQ
GPIOB Interrupt Priority Level (GPIOB IPL)—Bits 3–2
GPIOC Interrupt Priority Level (GPIOC IPL)—Bits 1–0
IPL)—Bits 15–14
Quadrature Decoder 1 HOME Signal Transition or Watchdog Timer
Interrupt Priority Level (DEC1_HIRQ IPL)—Bits 13–12
DEC1_XIRQ
15
0
IPL
14
0
Figure 5-8 Interrupt Priority Register 5 (IPR5)
DEC1_HIRQ
13
0
IPL
12
0
56F8357 Technical Data, Rev. 15
11
SCI1_RCV
0
IPL
10
0
SCI1_RERR
9
0
IPL
8
0
7
0
0
6
0
0
SCI1_TIDL
5
0
IPL
4
0
SCI1_XMIT
3
0
Freescale Semiconductor
IPL
2
0
SPI0_XMIT
1
0
IPL
Preliminary
0
0
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