dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 61
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
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Rn without an associated data move.
4.4.1.5
The address of the operand is in the address register, Rn (see Table 4-1 and Figure 4-8).
After the operand address is used, it is decremented by the contents of the Nn register
and stored in the same address register. The contents of the Nn register are unchanged.
This mode cannot be used for making XY: memory references, but it can be used to mod-
MOTOROLA
Assembler Syntax: (Rn)+
Memory Spaces: P:, X:, Y:, XY:, L:
Additional Instruction Execution Time (Clocks): 0
Additional Effective Address Words: 0
EXAMPLE: MOVE B0,Y: (R1)+
55 48 47
A
7
B2
F
0 23
6
Postdecrement By Offset Nn
5 4
BEFORE EXECUTION
Figure 4-5 Address Register Indirect — Postincrement
B1
3
$2501
$2500
2
24 23
1
0 23
Freescale Semiconductor, Inc.
23
X X X X X X
X X X X X X
For More Information On This Product,
F
M1
R1
N1
Y MEMORY
ADDRESS GENERATION UNIT
E D C B A
15
15
15
B0
$FFFF
$2500
XXXX
Go to: www.freescale.com
ADDRESSING
0
0
0
0
0
0
55 48 47
A
7
B2
F
0 23
6
5
AFTER EXECUTION
4
B1
3
$2501
$2500
2
24 23
1 F
0 23
B0
23
X X X X X X X
$ F E D C B A
M1
R1
N1
E
Y MEMORY
15
15
15
D C
$2501
$FFFF
XXXX
B
A
0
0
0
0
0
0
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