saa7199b NXP Semiconductors, saa7199b Datasheet
saa7199b
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saa7199b Summary of contents
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... DATA SHEET SAA7199B Digital Video Encoder (DENC) GENLOCK-capable Product specification Supersedes data of April 1993 File under Integrated Circuits, IC22 INTEGRATED CIRCUITS 1996 Sep 27 ...
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... Sep 27 2 C-bus interfaces for GENERAL DESCRIPTION The SAA7199B encodes digital baseband colour/video data into analog Y, C and CVBS signals (S-video included). Pixel clock and data are line-locked to the horizontal scanning frequency of the video signal. The circuit can be used in a square pixel consumer TV application ...
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... Philips Semiconductors Digital Video Encoder (DENC) GENLOCK-capable BLOCK DIAGRAM 1996 Sep 27 3 Product specification SAA7199B ...
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... B (blue) respectively U signal; bit 6 (formats in Tables 19 to 25) PD3(7) 31 data 3 input: digital signal B (blue) respectively U signal; bit 7 (formats in Tables 19 to 25) MPK 32 multi-purpose key input; active HIGH A0 33 subaddress bit A0 input for microcontroller access (Table 3) 1996 Sep 27 DESCRIPTION 4 Product specification SAA7199B ...
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... V 72 analog supply 3 for output buffer amplifier of DAC3 (5 V) DDA3 KEY 73 key input signal to insert CVBS input signal into encoded CVBS output signal; active HIGH 1996 Sep 27 DESCRIPTION 2 C-bus or MPU-bus); real time control input, defined 5 Product specification SAA7199B ...
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... CVBS input signal; bit 4 CVBS5 81 digital CVBS input signal; bit 5 CVBS6 82 digital CVBS input signal; bit 6 CVBS7 83 digital CVBS input signal; bit 7 HSN 84 horizontal sync output; active LOW or active HIGH for 60/66/72 12.27/13.5/14.75 MHz (3-state output) 1996 Sep 27 DESCRIPTION PIXCLK at 6 Product specification SAA7199B ...
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... V SSD2 PD3(0) 24 PD3(1) 25 PD3(2) 26 PD3(3) 27 PD3(4) 28 PD3(5) 29 PD3(6) 30 PD3(7) 31 MKP 32 1996 Sep 27 SAA7199B Fig.2 Pin configuration. 7 Product specification SAA7199B 74 HSY 73 KEY 72 V DDA3 71 CUR 70 V DDA2 69 CVBS 68 V SSA DDA1 DDA4 63 V refH 62 V refL ...
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... Philips Semiconductors Digital Video Encoder (DENC) GENLOCK-capable FUNCTIONAL DESCRIPTION The SAA7199B is a digital video encoder that translates digital RGB, YUV or 8-bit indexed colour signals into the analog PAL/NTSC output signals Y (luminance), C (4.43/3.58 MHz chrominance) and CVBS (composite signal including sync). Four different modes are selectable (Table 18): ...
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... The Bit Allocation Map (BAM) shows the individual control signals, used to control the different operational modes of the circuit. The I The SAA7199B also has an MPU-bus interface for direct microcontroller connection. The BAM shown in Table 6 resembles the I parallel bus; the control registers are indexed from 00H to 0FH ...
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... LSB of slave address byte (read = HIGH; write = LOW) A1 (pin 34 subaddresses after decoding A0 (pin 33 subaddresses after decoding data bits for each subaddress CS and R/W enable by every 9th clock of sample of SCL (control of serial-to-parallel conversion) 10 Product specification SELECTION DESCRIPTION 2 I C-BUS INTERFACE SAA7199B ...
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... Philips Semiconductors Digital Video Encoder (DENC) GENLOCK-capable 1996 Sep 27 11 Product specification SAA7199B ...
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... CHPS6 CHPS5 CHPS4 CHPS3 FSCO6 FSCO5 FSCO4 FSCO3 ( CLCK STD3 Product specification SAA7199B CCIR MOD1 MOD0 TRER2 TRER1 TRER0 TREG2 TREG1 TREG0 TREB2 TREB1 TREB0 (2) HPLL HLCK OEF GDC2 GDC1 GDC0 IDEL2 ...
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... MKP = HIGH sets in real time with respect to PDn (7 to 0); functions see Table 11 1996 Sep 27 FUNCTION GDC) pixel clocks = t earlier with respect to reference point t ofs earlier with respect to reference point t Rint is designated for pipeline delay of the feeding RAM interface, Fig.10). Rint 13 Product specification SAA7199B 2 C-bus) 2 C-bus) 2 C-bus) . REF1 (t corresponds to REF2 ...
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... C-bus: see Table 15 YUV format; DMSD2 compatible YUV format; customized YUV format; DMSD2 compatible YUV format; customized YUV format RGB format reserved 8-bit indexed colour 14 Product specification - the subcarrier frequency in 256 steps FORMAT MODE SAA7199B ...
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... NTSC-M; 60 Hz; SQP (12.27 MHz) 1 NTSC-M; 60 Hz; CCIR (13.5 MHz) 0 reserved 1 reserved 16) = 16; Y(X 235) = 235 (equation 1) with g = 2.2: 2 C-bus (Table 17). 15 Product specification SAA7199B LEVEL MATRIX MATCHING control via FMT bits control via CCIR bit active CCIR level active CCIR level STANDARD 219 a = --------------------------------------- - – ...
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... ACKs STOP condition STATUS BYTE FUNCTION DESCRIPTION OF BYTE (00 to FF) 16 Product specification SAA7199B ACK -------- DATA n DESCRIPTION FFOS OEF CLCK (auto-increment) 3 data bytes for one RGB sequence (auto-increment) ACK P ...
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... RGB or the YUV source signal to provide data and composite blanking CB. Slave The SAA7199B receives the line-locked clock CLKIN, CSYN or HSN/VSN, CB and data from an RGB or YUV source. The sync inputs are edge-sensitive; their minimum active length is 1 PIXCLK. ...
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... Y) equals equals V; (n) = number Y(4) Y(5) Y(6) Cb7(4) Cb5(4) Cb3(4) Cb6(4) Cb4(4) Cb2(4) Cr7(4) Cr5(4) Cr3(4) Cr6(4) Cr4(4) Cr2( Y(4) Y(5) Y(6) Cb7(4) Cr7(4) Cb6(4) Cr6(4) Cb5(4) Cr5(4) Cb4(4) Cr4(4) Cb3(4) Cr3(4) Cb2(4) Cr2(4) Cb1(4) Cr1(4) Cb0(4) Cr0(4) SAA7199B 7 Y(7) Cb1(4) Cb0(4) Cr1(4) Cr0(4) 7 Y(7) ...
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... Cr6(4) Cb6(6) Cb5(4) Cr5(4) Cb5(6) Cb4(4) Cr4(4) Cb4(6) Cb3(4) Cr3(4) Cb3(6) Cb2(4) Cr2(4) Cb2(6) Cb1(4) Cr1(4) Cb1(6) Cb0(4) Cr0(4) Cb0( Y(4) Y(5) Y(6) Cb(4) Cb(6) Cr(4) Cr( Y(4) Y(5) Y(6) Cb(4) Cb(5) Cb(6) Cr(4) Cr(5) Cr( R(4) R(5) R(6) G(4) G(5) G(6) B(4) B(5) B( INC(4) INC(5) INC(6) SAA7199B 7 Y(7) Cr7(6) Cr6(6) Cr5(6) Cr4(6) Cr3(6) Cr2(6) Cr1(6) Cr0(6) 7 Y(7) 7 Y(7) Cb(7) Cr(7) 7 R(7) G(7) B(7) 7 INC(7) ...
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... CVBS(4) CVBS(5) CVBS(6) two’s complement representation corresponding to binary code 128 corresponding to binary code 64 corresponding to binary code 95 corresponding to binary code 95 corresponding to binary code 100 Product specification SAA7199B FORMAT CVBS(7) ...
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... ( (3) (3) ( SAA7199B MODULATOR OUTPUT DATA ( 421 0 387 135 332 189 297 178 245 175 211 188 154 134 120 0 120 416 ...
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... MHz. 10 handbook, halfpage (dB 0.2 0.4 Fig.4 Transfer characteristics decimator. 1996 Sep 27 MEH346 10 handbook, halfpage (dB 0.6 0 CLK Fig.5 22 Product specification SAA7199B Overall transfer characteristics input data. MEH347 8 f (MHz) ...
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... Fig.7 MEH350 10 handbook, halfpage (dB (MHz) Fig.9 23 Product specification SAA7199B (MHz) Overall transfer characteristics input data (SCBW-bit = 1 (MHz) Overall transfer characteristics input data (SCBW-bit = 0). MEH349 8 MEH351 8 ...
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... The key input signal is delay compensated with respect to PDn data input. The generated vertical field and burst blanking sequences are shown in Fig.11 (50 Hz PAL) and Fig.12 (60 Hz NTSC). 24 Product specification SAA7199B MODE set by GDC-bits; ofs of the RAM interface (valid also in Rint ...
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... RAM tables is not certain). To re-enable the circuit, CLKIN must be set to a frequency <32 MHz, a hardware reset is then required to set DD-bit to zero. t REF2 (1) t Rint (2) t active video 0 to 640/720/780 PIXCLK t enc Fig.10 Horizontal timing. 25 Product specification t REF1 (3) t ofs SAA7199B MEH345-1 ...
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... CVBS output signal VSN CB Fig.11 Vertical field and burst blanking sequence for PAL 50 Hz mode. 1996 Sep 625 3 313 314 315 316 312 26 Product specification SAA7199B 318 319 320 317 24 25 335 336 MEH352-1 ...
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... CVBS output signal 260 261 259 VSN CB Fig.12 Vertical field and burst blanking sequence for NTSC 60 Hz mode. 1996 Sep 525 3 265 263 264 266 262 27 Product specification SAA7199B 269 268 270 267 20 21 281 282 MEH353-1 ...
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... P total power dissipation tot T storage temperature stg T operating ambient temperature amb V electrostatic handling for all pins esd Note 1. Equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor. 1996 Sep 27 PARAMETER 28 Product specification SAA7199B CONDITIONS MIN. MAX. 0.3 +7 0.3 +7 0.3 +7 0.3 +7 0.3 +7 0.3 +7 0.3 +7 100 ...
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... DDD1 DDD3 note 1 note 1 note 2 note 2 without load; V without load; V without load; V not tested recommendation 3 dB 9-bit data 9-bit data Fig.1; R 70- LOW or HIGH during acknowledge 29 Product specification SAA7199B MIN. TYP. 4.75 5.0 5.25 4.5 5.0 5.5 60 140 0 0.8 2 1.4 2 0.6 2 ...
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... HD; DAT CREF timing (pin 56) see Fig.18 t input set-up time SU(CREF) t input hold time h(CREF) 1996 Sep 27 CONDITIONS 3rd harmonic; Table 1 3rd harmonic; Table 1 n note 3 30 Product specification SAA7199B MIN. TYP. MAX. UNIT 24.576 MHz 26.8 MHz 20% 1 ...
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... LLC 31 Product specification SAA7199B TYP. MAX. UNIT 275 ...
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... Sep 27 MEH357 handbook, halfpage (MHz) XTALO 60 ( (2) SAA7199B XTALI (dB Fig.14 Characteristics of low-pass post-filters.; with compensation of DC hold. XTALO 60 SAA7199B XTALI 59 (b) Product specification SAA7199B MEH358 (MHz) MHA417 ...
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... Philips Semiconductors Digital Video Encoder (DENC) GENLOCK-capable 1996 Sep 27 33 Product specification SAA7199B ...
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... PDn CB, MPK, KEY and RTCI (pin 57) CLKO and PIXCLK 1996 Sep 2.0 V 1 w(CH) T cy(LLC cy(CLKIN) t h(LDV) t su(LDV) 2.0 V 1 SU; DAT t HD; DAT 2.0 V data valid 0 d(CLK) Fig.17 LDV input data timing. 34 Product specification SAA7199B t r PIXCLK CLKO MEH421 ...
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... HCL, HSY, HSN, VSN and CSYN input data CVBS 1996 Sep w(CH) T cy(LLC) t h(CREF) t su(CREF) 2.0 V 1 data valid t SU; DAT t HD; DAT 2.0 V data valid 0.8 V Fig.18 Clock and data timing. 35 Product specification SAA7199B t r 2.0 V 1.5 V 0.8 V 2.4 V data valid 0.6 V MEH355 ...
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... CS inputs A1 and A0 input R/W write read 1996 Sep 27 t W(CL) t W(CH) t su(ADD) t h(ADD) 1.5 V data valid t su(R) t h(R) 1 su;DAT 1 d(DR) t d(ZR) 1.5 V Fig.19 MPU-bus timing. 36 Product specification SAA7199B 2.0 V 1 h;DAT data valid t d(RZ) t d(Q) data valid MEH356 ...
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... detail max. 30.35 1.22 1.44 0.51 0.18 0.18 30.10 1.07 1.02 1.195 0.048 0.057 0.020 0.007 0.007 0.004 1.185 0.042 0.040 EUROPEAN PROJECTION Product specification SAA7199B SOT189 (1) ( max. max. 0.10 2.16 2. 0.085 0.085 ISSUE DATE 92-11-17 95-03-11 ...
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... Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 38 Product specification SAA7199B ...
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... I Philips. This specification can be ordered using the code 9398 393 40011. 1996 Sep components conveys a license under the Philips’ system provided the system conforms to the I 39 Product specification SAA7199B 2 C patent to use the 2 C specification defined by ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + ...