saa7372 NXP Semiconductors, saa7372 Datasheet
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saa7372 Summary of contents
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... DATA SHEET SAA7372 Digital servo processor and Compact Disc decoder (CD7) Product specification Supersedes data of 1995 Dec 06 File under Integrated Circuits, IC01 INTEGRATED CIRCUITS 1998 Feb 26 ...
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... INTERFACE TIMING) 11 OPERATING CHARACTERISTICS 2 (I S-BUS TIMING) 12 OPERATING CHARACTERISTICS (MICROCONTROLLER INTERFACE TIMING) 13 APPLICATION INFORMATION 14 PACKAGE OUTLINE 15 SOLDERING 15.1 Introduction 15.2 Reflow soldering 15.3 Wave soldering 15.4 Repairing soldered joints 16 DEFINITIONS 17 LIFE SUPPORT APPLICATIONS 18 PURCHASE OF PHILIPS I 2 Product specification SAA7372 2 C-bus mode COMPONENTS ...
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... On-chip clock multiplier allows the use of 8.4672 MHz crystal. 2 GENERAL DESCRIPTION The SAA7372 is a single chip combining the functions decoder IC and digital servo IC. The decoder part is based on the SAA7345 (CD6) with an improved error correction strategy. The servo part is based on the TDA1301T (DSIC2) with improvements incorporated, extra features have also been added ...
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... CONTROL 26 FUNCTION 27 OUTPUT STAGES 28 CONTROL PART 64 SAA7372 33 MOTOR 34 CONTROL ERROR CORRECTOR 61 FLAGS 60 AUDIO PROCESSOR 31 EBU INTERFACE PEAK DETECT 48 46 SERIAL DATA 45 INTERFACE 44 KILL 43 MGC973 KILL Product specification SAA7372 LDON MOTO1 MOTO2 CFLG C2FAIL DOBM SCLK WCLK DATA EF ...
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... P-to-W subcode output bits (3-state) digital ground 2 versatile output pin 5 5 Product specification DESCRIPTION ) DD SAA7372 ...
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... LOW) servo interrupt request line/decoder status register output (open-drain) digital supply voltage 3 for core indication of correction failure output (open-drain) correction flag output (open-drain) versatile input pin 1 versatile input pin 2 laser drive on output (open-drain) 6 Product specification DESCRIPTION modes (3-state) s SAA7372 ...
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... refT SSA2 12 SELPLL 13 ISLICE 14 HFIN 15 V SSA3 16 1998 Feb 26 SAA7372 Fig.2 Pin configuration. 7 Product specification SAA7372 48 SCLK 47 V DDD2(P) 46 WCLK 45 DATA KILL SSD2 38 SUB 37 RCK 36 SFSY 35 SBSY 34 ...
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... The lock-to-disc mode is enabled/disabled by register E. 7.1.4 S TANDBY MODES The SAA7372 may be placed in two standby modes selected by register B (it should be noted that the device core is still active) Standby 1: “CD-STOP” mode. Most I/O functions are switched off. ...
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... This is internally connected from the servo part (its polarity can be changed by the foc_parm1 parameter), but may be input via the V1 pin if selected by register C. If this flag is HIGH, the SAA7372 will assume that its servo part is following on the wrong track and will flag all incoming HF CRIN data as incorrect ...
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... RL2 symbol are compared and the correction is executed at the side with the highest error probability. 7.4.2 The 14-bit EFM data and subcode words are decoded into 8-bit symbols. 10 Product specification crystal clock D Q DPLL 100 MGA368 - 1 100 A EFM DEMODULATION SAA7372 ...
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Acrobat reader. white to force landscape pages to be ... reg D V4 SUBCODE INTERFACE SUBCODE PROCESSOR output from DIGITAL ...
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... GRAPHICS SF1 SF2 SF3 P-W P-W EIAJ 4-wire subcode interface SF1 SF2 SF3 P-W P-W EIAJ 3-wire subcode interface SFSY RCK SUB Fig.7 EIAJ subcode (CD graphics) interface format. 12 Product specification V4 SUBCODE INTERFACE SF97 SF0 SF1 P-W SF97 SF0 SF1 P SAA7372 MBG410 ...
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... W96 n = disc speed 7.6 FIFO and error corrector The SAA7372 has a 8 frame FIFO. The error corrector type, with error corrections on both C1 (32 symbol) and C2 (28 symbol) frames. Four symbols are used from each frame as parity symbols. This error corrector can correct up to two errors on the C1 level and up to four errors on the C2 level ...
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... If the de-emphasis signal is set to be available at V5, selected via register D, then the de-emphasis filter is bypassed. 7.7.2 D IGITAL OVERSAMPLING FILTER The SAA7372 contains times oversampling IIR filter. The filter specification of the 4 times oversampling filter is given in Table 3. 1998 Feb ...
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... UTE FULL SCALE ATTENUATION AND FADE A digital level controller is present on the SAA7372 which performs the functions of soft mute, full scale, attenuation and fade; these are selected via register 0: Mute: signal reduced maximum of 128 steps; (3/n) ms. Attenuate: signal scaled by 12 dB. ...
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... DAC interface The SAA7372 is compatible with a wide range of digital-to-analog converters (DACs). Eleven formats are supported and are given in Table 4. Figures 11 and 12 show the Philips I decoder is operated in lock-to-disc mode, the SCLK frequency is dependent on the disc speed factor ‘d’. All formats are MSB first and f is (44 ...
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Acrobat reader. white to force landscape pages to be ... SCLK DATA LEFT CHANNEL DATA (WCLK NORMAL POLARITY) WCLK EF ...
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... CFLG error and interpolation flags when selected by register A first 4 bits not used (always zero). 2’s compliment. LSB = bit 12, MSB = bit 27 valid = logic 0 used for subcode data (Q-to-W) control bits and category code even parity for bits DESCRIPTION 18 Product specification F ORMAT DESCRIPTION SAA7372 ...
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... V5 (if selected to be the de-emphasis flag output) and the EBU outputs become undefined. It should be noted that the EBU output should be set LOW prior to switching the audio features off and after switching audio features back on a full-scale command should be given. 19 Product specification DESCRIPTION Audio features off SAA7372 ...
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... Philips Semiconductors Digital servo processor and Compact Disc decoder (CD7) 7.12 The VIA interface The SAA7372 has five pins that can be reconfigured for different applications (see Table 8). Table 8 Pin applications PIN PIN NAME TYPE NUMBER V1 62 input V2 63 input V3 42 output V4 41 ...
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... Fig.13 Motor pulse density application diagrams dead rep Accelerate Fig.14 2-line PWM mode timing 100 Fig.15 Motor 2-line PWM mode application diagram. 21 Product specification 22 k MOTO2 + – MGA363 - 1 240 ns Brake MGA366 MOTO2 MGA365 - 2 SAA7372 ...
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... Digital servo processor and Compact Disc decoder (CD7) 7.13.1.3 PWM output mode (4-line) Using two extra outputs from the versatile pins interface possible to use the SAA7372 with a 4-input motor bridge. The timing is illustrated in Fig.16. A typical application diagram is illustrated in Fig.17. t rep MOTO1 ...
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... PINDLE MOTOR OPERATING MODES The operation modes of the motor servo is controlled by register 1 (see Table 9). In the SAA7372 decoder there is an anti-wind-up mode for the motor servo, selected via register 1. When the anti-wind-up mode is activated the motor servo integrator will hold if the motor output saturates. ...
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... The CA signal is processed into an HF signal (for the decoder function) and LF signal (information for the focus servo loop) before it is supplied to the SAA7372. The analog signals from the central and satellite diodes are converted into a digital representation using analog-to-digital converters (ADCs) ...
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... The four signals from the central aperture detectors, together with the satellite detector signals generate a track position signal (TPI) which can be formulated as follows; TPI = sign [( D4) Where the weighting factor sum_gain is generated internally by the SAA7372 during initialization. SATELLITE DIODE ...
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... In this mode, track counting results in an ‘automatic return-to-zero track’, to avoid major music rhythm disturbances in the audio output for improved shock resistance. 26 Product specification SAA7372 Focus automatic gain control loop ADIAL SERVO SYSTEM Level initialization 300 ms. This start-up Sledge control Tracking control 2 ...
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... Fast counting state: used in high velocity track jump situations. Highest obtainable velocity is the most important feature in this state. 27 Product specification Radial automatic gain control loop TRACK COUNTING 1 of the track-pitch. In combination with 4 SAA7372 1 radians 2 ...
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... FILTER sat2 A defect detection circuit is incorporated into the SAA7372 defect is detected, the radial and focus error signals may be zeroed, resulting in better playability. The defect detector can be switched off, applied only to focus control or applied to both focus and radial controls under software control (part of foc_parm1) ...
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... Hz, and upper corner frequency at 750 or 1850 Hz. The shock detector is switched off automatically during jump mode. LOW-PASS FILTER (750 or 1850 Hz) Fig.21 Block diagram of radial shock detector. 29 Product specification SAA7372 ASER INTERFACE ADIAL SHOCK DETECTOR AMPLITUDE SHOCK DETECTION OUTPUT MGC914 ...
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... Q-channel subcode. d) SILD = R/W control and data strobe (active LOW) for servo commands C-bus mode: I C-bus protocol where SAA7372 behaves as slave device, activated by setting RAB = HIGH and SILD = LOW where C-bus slave address (write mode) = 30H C-bus slave address (read mode) = 31H ...
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... It should be noted that RAB must be held LOW; the command or data is interpreted by the SAA7372 after the HIGH-to-LOW transition of SILD; there must be a minimum time between SILD pulses. ...
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... RAB (microcontroller) SCL (microcontroller) SDA (microcontroller) SDA (SAA7372) Fig.23 Microcontroller write protocol for registers (repeat mode). RAB (microcontroller) SCL (microcontroller) SDA (microcontroller) SDA (SAA7372) Fig.24 Microcontroller read protocol for decoder status on SDA. 1998 Feb high-impedance ...
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... Philips Semiconductors Digital servo processor and Compact Disc decoder (CD7) RAB (microcontroller) SCL (microcontroller) SDA (SAA7372) Fig.25 Microcontroller protocol for reading Q-channel subcode. RAB (microcontroller) SCL (microcontroller) SDA (SAA7372) Fig.26 SUBQREADY-I status timing when no subcode is read. 1998 Feb 26 CRC ...
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... Philips Semiconductors Digital servo processor and Compact Disc decoder (CD7) RAB (microcontroller) SCL (microcontroller) SDA (SAA7372 ) Fig.27 SUBQREADY-I status timing when subcode is read. handbook, full pagewidth SILD (microcontroller) SCL (microcontroller) SDA (microcontroller) SDA (SAA7372) SILD (microcontroller) SDA COMMAND (microcontroller) Fig.28 Microcontroller protocol for write servo commands. ...
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... SILD (microcontroller) SDA (microcontroller) Fig.29 Microcontroller protocol for repeated data in write servo commands. SILD handbook, full pagewidth (microcontroller) SCL (microcontroller) SDA (SAA7372) SILD (microcontroller) SDA (SAA7372) SDA COMMAND (microcontroller) Fig.30 Microcontroller protocol for read servo commands. 1998 Feb 26 COMMAND DATA1 ...
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... I S-bus; 16-bit; f mode s 0000 EIAJ; 16-bit 0011 EAIJ; 16-bit 0010 EIAJ; 16-bit 0100 EIAJ; 18-bit 0111 EIAJ; 18-bit 0110 EIAJ; 18-bit Product specification SAA7372 FUNCTION (1) INITIAL reset reset reset reset reset ...
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... DAC (WCLK inverted) see Table 13 0011 PLL loop filter equalization 0001 PLL 30 ns over-equalization 0010 PLL 15 ns over-equalization 0100 PLL 15 ns under-equalization 0101 PLL 30 ns under-equalization 37 Product specification SAA7372 FUNCTION (1) INITIAL reset reset reset reset reset reset reset reset reset reset ...
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... Product specification SAA7372 FUNCTION (1) INITIAL reset reset reset reset reset reset reset reset reset reset ...
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... Product specification FUNCTION FUNCTION INTERNAL LOW-PASS BANDWIDTH (Hz) (Hz) 525 n 8400 n 263 n 16800 n 131 n 33600 n 1050 n 8400 n 525 n 16800 n 263 n 33600 n 2101 n 8400 n 1050 n 16800 n 525 n 33600 n 4200 n 8400 n 2101 n 16800 n 1050 n 33600 n SAA7372 (1) INITIAL reset reset (1) INITIAL reset ...
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... Product specification SAA7372 PARAMETERS ...
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... Product specification SAA7372 DETERMINES ...
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... AGC AGC control frequency of injected signal focus/radial AGC phase shift of injected signal focus/radial AGC amplitude of signal injected focus/radial AGC amplitude of signal injected focus/radial AGC focus/radial gain 42 Product specification SAA7372 DETERMINES level setting ...
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... SSA amb HFREF note 1 43 Product specification MIN. MAX. 0.5 +6.5 0 0.5 DD 0.5 +6.5 0. +70 55 +125 2000 +2000 200 +200 MIN. TYP. MAX. 3.4 5 1.0 0.5V DD SAA7372 UNIT UNIT V mA MHz 0 ...
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... DD 44 Product specification MIN. TYP. MAX. 1.935 5.45 220 620 1.2 3.871 10.9 1.935 5. 0.5 v/44.4 30% 0.5 10 +30 0.8V 0.2V DDD 0.33V DDD 0.3 0.3V 0. +10 10 SAA7372 UNIT DDD 0 ...
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... pF; L 0.8 (V 0.8) DDD pF 0.8) 0.8 DDD LDON ( - AND OPEN DRAIN OUTPUT WITH PROTECTION DIODE pF 0.8) 0.8 DDD 45 Product specification SAA7372 TYP. MAX. UNIT 0 DDD 0 DDD 1 DDD ...
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... Product specification MIN. TYP. MAX. 0 0 0 +10 0 1 +10 SAA7372 UNIT ...
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... TYP. MAX DDD 0.3 0.3V 0.7V V DDD DDD 0.3 0. 8.4672 kHz. i(ADC) G where; i ADC = the DC input current 4.2336 MHz) and on V sys RH SAA7372 UNIT V DDD + 0 0 MHz mA/V V ...
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... The subcode timing is directly related to the overspeed factor ‘n’ in normal operating mode. ‘n’ is replaced by the disc speed factor ‘d’, in the lock-to-disc mode. 1998 Feb +70 C; unless otherwise specified. CONDITIONS n); see Fig.31; note pF Product specification SAA7372 MIN. TYP. MAX. 2/n 4/n 6/n 2/n 4/n 6/n ...
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... SFSY RCK SUB 1998 Feb 26 t W(SBSY) t SFSYH t W(SFSY) t cy(frame) t SFSYL 0 d(SFSY RCK – 0 d(SFSY SUB) t h(RCK SUB) Fig.31 Subcode interface timing diagram. 49 Product specification T cy(block 0 d(RCK SUB – 0.8 V 0.8 V MBG414 SAA7372 ...
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... 0 Fig.32 I S-bus timing diagram. 50 Product specification MIN. TYP. 472.4/n 236.2/n 118.1/n 166/n 83/n 42/n 166/n 83/n 42/n 95/n 48/n 24/n 95/n 48/n 24 – 0 0.8 V – 0.8 V MBG407 SAA7372 MAX. UNIT ...
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... Product specification LOCK-TO-DISC MODE MAX. MIN. MAX. 2400 2400 480/n 480/n 480/n 480 960 720 4800 720/n 960 4800 1200 710 710 240 240 240 240 SAA7372 UNIT ...
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... Negative set-up time means that the data may change after clock transition. 1998 Feb 26 NORMAL MODE CONDITIONS MIN. 25 950 50 480 830 0 950 480 120 Product specification SAA7372 LOCK-TO-DISC MODE MAX. MIN. MAX. 25 950 50 480 830 0 950 480 120 70 0 UNIT ns ...
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... Philips Semiconductors Digital servo processor and Compact Disc decoder (CD7 RAB t dRD SCL SDA (SAA7372) high-impedance Fig.33 4-wire bus microcontroller timing; read mode (Q-channel subcode and decoder status information). handbook, full pagewidth RAB SCL SDA (microcontroller) Fig.34 4-wire bus microcontroller timing; write mode (registers 0 to F). ...
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... Fig.36 4-wire bus microcontroller timing write mode (servo commands). 1998 Feb 26 t hCLR t sCLR V DD – 0 dLD 0 sCL dWZ Product specification SAA7372 V DD – 0 dLZ MGC987 dPLP V DD – 0 hCL MBG416 ...
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... V DDD2(P) SAA7372 V SSD2 MOTO2 MOTO1 power to DOBM amplifiers transformer (2) 2.2 100 nF Fig.37 Typical SAA7372 application diagram. V DDD 2.2 48 SCLK 47 100 nF 46 WCLK to DAC 45 DATA KILL ...
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... scale (1) ( 0.45 0.23 14.1 14.1 17.45 0.8 0.30 0.13 13.9 13.9 16.95 REFERENCES JEDEC EIAJ MS-022 detail 17.45 1.03 1.60 0.16 0.16 0.10 16.95 0.73 EUROPEAN PROJECTION Product specification SAA7372 SOT393 (1) ( 1.2 1 0.8 0.8 0 ISSUE DATE 96-05-21 97-08-04 ...
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... Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 57 Product specification SAA7372 ...
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... Philips. This specification can be ordered using the code 9398 393 40011. 1998 Feb 26 C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 58 Product specification SAA7372 2 C patent to use the 2 C specification defined by ...
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... Philips Semiconductors Digital servo processor and Compact Disc decoder (CD7) 1998 Feb 26 NOTES 59 Product specification SAA7372 ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, ...