saa7826 NXP Semiconductors, saa7826 Datasheet - Page 17

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saa7826

Manufacturer Part Number
saa7826
Description
Cd Audio Decoder, Digital Servo And Filterless Dac With Integrated Pre-amp And Laser Control
Manufacturer
NXP Semiconductors
Datasheet

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7.8
The SAA7826 has a 8 frame FIFO. The error corrector is
a t = 2, e = 4 type, with error corrections on both C1
(32 symbol) and C2 (28 symbol) frames. Four symbols are
used from each frame as parity symbols. This error
corrector can correct up to two errors on the C1 level and
up to four errors on the C2 level.
The error corrector also contains a flag processor. Flags
are assigned to symbols when the error corrector cannot
ascertain if the symbols are definitely good. C1 generates
output flags which are read after de-interleaving by C2, to
help in the generation of C2 output flags.
The C2 output flags are used by the interpolator for
concealment of uncorrectable errors. They are also output
via the EBU signal (DOBM). The EF output flags bytes in
error in both audio and CD-ROM modes.
2003 Oct 01
handbook, full pagewidth
CD audio decoder, digital servo and filterless
DAC with integrated pre-amp and laser control
Where n = disc speed.
Where n = disc speed.
FIFO and error correction
W96
CDTDATA
CDTRDY
CDTCLK
200/n s
min
CRC flag
Fig.10 Subcode format and timing on pin V4.
Fig.11 CD text interface format and timing.
1
73/n s to 317/n s
11.3/n
Q
s
D0
R
D1
200 ns (min)
~1/n ns
S
D2
17
T
7.8.1
The flags output pin CFLG shows the status of the error
corrector and interpolator and is updated every frame
(7.35
on the CFLG pin as illustrated in Fig.12. This signal shows
the status of the error corrector and interpolator.
The first flag bit, F1, is the absolute time sync signal, the
FIFO-passed subcode sync and relates the position of the
subcode sync to the audio data (DAC output). This flag
may also be used in a super FIFO or in the synchronization
of different players. The output flags can be made
available at bit 4 of the EBU data format (LSB of the 24-bit
data word), if selected by decoder register A.
D3
U
V
n kHz). In the SAA7826, 8
F
LAGS OUTPUT
W
11.3/n s min
90/n s max
D126
(CFLG)
D127
MBL441
1
MBG401
1-bit flags are present
Q
Product specification
SAA7826

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