ep2sgx30c Altera Corporation, ep2sgx30c Datasheet - Page 91
ep2sgx30c
Manufacturer Part Number
ep2sgx30c
Description
Stratix Ii Gx Device Data Sheet
Manufacturer
Altera Corporation
Datasheet
1.EP2SGX30C.pdf
(314 pages)
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Altera Corporation
October 2007
Table 2–21
DSP block multipliers can optionally feed an adder/subtractor or
accumulator in the block, depending on the configuration, which makes
routing to ALMs easier, saves ALM routing resources, and increases
performance because all connections and blocks are in the DSP block.
Additionally, the DSP block input registers can efficiently implement shift
registers for FIR filter applications, and DSP blocks support Q1.15 format
rounding and saturation.
DSP block configured for 18 × 18-bit multiplier mode.
Note to
(1)
EP2SGX30
EP2SGX60
EP2SGX90
EP2SGX130
Table 2–21. DSP Blocks in Stratix II GX Devices
Device
This list only shows functions that can fit into a single DSP block. Multiple DSP
blocks can support larger multiplication functions.
Table
shows the number of DSP blocks in each Stratix II GX device.
2–21:
DSP Blocks
16
36
48
63
Figure 2–58
Multipliers
Total 9 × 9
128
288
384
504
Stratix II GX Device Handbook, Volume 1
shows the top-level diagram of the
Total 18 × 18
Multipliers
Note (1)
144
192
252
Stratix II GX Architecture
64
Total 36 × 36
Multipliers
16
36
48
63
2–83
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