cy8c20180 Cypress Semiconductor Corporation., cy8c20180 Datasheet

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cy8c20180

Manufacturer Part Number
cy8c20180
Description
Capsense Express -8 Configurable Ios
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Features
Cypress Semiconductor Corporation
Document Number: 001-17346 Rev. *C
8 configurable IOs supporting
2.4V to 5.25V operating voltage
Industrial temperature range: –40°C to +85°C
I
Reduce BOM cost
Low operating current
Available in 16-pin COL and 16-pin SOIC packages
2
C slave interface for configuration
CapSense buttons
LED Drive
Interrupt outputs
WAKE on interrupt input
User defined input or output
Selectable to 50 kHz,100 kHz and 400 kHz
Internal oscillator - no external oscillators or crystal
Free development tool - no external tuning components
Active current: continuous sensor scan:1.5 mA
Sleep current: no scan, continuous sleep: 2.6 uA
198 Champion Court
CapSense
Overview
The CapSense Express
configurable as capacitive sensing buttons or as GPIOs for
driving LEDs or interrupt signals based on various button
conditions. The GPIOs are also configurable for waking up the
device from sleep based on an interrupt input.
The user has the ability to configure buttons, outputs, and
parameters through specific commands sent to the I
IOs have the flexibility in mapping to capacitive buttons and as
standard GPIO functions such as interrupt output or input, LED
drive and digital mapping of input to output using simple logical
operations. This enables easy PCB trace routing and reduces
the PCB size and stack up. CapSense Express products are
designed for easy integration into complex products.
Architecture
The logic block diagram illustrates the internal architecture of
CY8C20180.
The user can configure registers with parameters needed to
adjust the operation and sensitivity of the CapSense system.
CY8C20180 supports a standard I
interface that allows the host to configure the device and to read
sensor information in real time through easy register access.
The CapSense Express Core
The CapSense Express Core has a powerful configuration and
control block. It encompasses SRAM for data storage, an
interrupt controller, sleep and watchdog timers. System
resources provide additional capability, such as a configurable
I
The Analog System is composed of the CapSense PSoC block
which supports capacitive sensing of up to eight inputs.
2
C slave communication interface and various system resets.
Express™ -8 Configurable IOs
San Jose
,
CA 95134-1709
TM
controller allows the control of 8 IOs
2
C serial communications
Revised March 11, 2008
CY8C20180
408-943-2600
2
C port. The
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cy8c20180 Summary of contents

Page 1

... CY8C20180. The user can configure registers with parameters needed to adjust the operation and sensitivity of the CapSense system. CY8C20180 supports a standard I interface that allows the host to configure the device and to read sensor information in real time through easy register access. The CapSense Express Core The CapSense Express Core has a powerful configuration and control block ...

Page 2

... Logic Block Diagram CapSense Express Core Document Number: 001-17346 Rev. *C External Vcc 8 Configurable IOs 2.4 - 5.25V TM 2KB Flash 512B SRAM CY8C20180 Page [+] Feedback ...

Page 3

... Configurable as CapSense or GPIO Configurable as CapSense or GPIO Active HIGH external reset with internal pull down Configurable as CapSense or GPIO Supply voltage Configurable as CapSense or GPIO Integrating Input.The external capacitance is required only if 5:1 SNR cannot be achieved. Typical range is 10-100 nF. Configurable as CapSense or GPIO CY8C20180 Page [+] Feedback ...

Page 4

... I C data Configurable as CapSense or GPIO Configurable as CapSense or GPIO Ground connection Configurable as CapSense or GPIO Configurable as CapSense or GPIO Configurable as CapSense or GPIO Active HIGH external reset with internal pull down. Configurable as CapSense or GPIO Supply voltage CY8C20180 V DD GP0[2] XRES GP1[4] GP1[3] GP1[ GP1[1] ...

Page 5

... –25 – +50 mA 2000 – – V Human body model ESD – – 200 mA Min Typ Max Unit –40 – +85 °C –40 – +100 °C CY8C20180 2 C interface are: AN42137 for details of the software document. Notes Notes Page [+] Feedback ...

Page 6

... – – 0 2.0 – – – 140 – mV CY8C20180 Notes = 3.0V 25° 2.55V, 0°C < T < 40° 3.3V, –40°C < T < 85° 5.25V, –40°C < T < 85°C A Notes > 3.0V, maximum of DD > 3.0V, maximum of DD > 3.0V, maximum of DD > 3.0V, maximum of DD > ...

Page 7

... 1.4 – – 1 – 60 – mV – 1 – nA Gross tested to 1 µA. 0.5 1 Package and pin dependent. Temp = 25°C. 0.5 1 Package and pin dependent. Temp = 25°C. CY8C20180 Notes Notes = 2.4 to 3.6V. = 2.4 to 2.7V. = 2.7 to 3.6V. Page [+] Feedback ...

Page 8

... CY8C20180 Notes V must be greater than or equal to DD 2.5V during startup, reset from the XRES pin, or reset from Watchdog. Notes V = 3.0V to 3.6V and 4.75V to 5.25V, DD 10 3.0V to 3.6V, 10 3.0V to 3.6V and 4.75V to 5.25V, DD ...

Page 9

... Figure 3. Definition for Timing for Fast/Standard Mode on the I2C Bus Document Number: 001-17346 Rev. *C CY8C20180 Page [+] Feedback ...

Page 10

... Refer to the solder manufacturer specifications. 3. Earlier termed as QFN package. Document Number: 001-17346 Rev. *C Package Diagram Package Type 001-09116 16 COL 51-85068 16 SOIC [2] Minimum Peak Temperature 240 °C 240 °C CY8C20180 Operating Temperature [3] Industrial Industrial Typical θ [ °C 79.96 °C Maximum Peak Temperature 260 °C 260 ° ...

Page 11

... TOP VIEW PART NO. DESCRIPTION LG16A LEAD-FREE STANDARD LD16A Document Number: 001-17346 Rev. *C 2.9 0.152 REF. 3.1 0.05 MAX 0.60 MAX SEATING PLANE SIDE VIEW Figure Pin (150-Mil) SOIC (51-85068) CY8C20180 0.20 min 0.45 0.55 1.5 (NOM PIN #1 ID 0.30 0.18 0.50 1.5 BOTTOM VIEW JEDEC # MO-220 Package Weight: 0.014g 001-09116-*C 51-85068-*B ...

Page 12

... Document History Page Document Title: CY8C20180 CapSense Express™ -8 Configurable IOs Document Number: 001-17346 Orig. of REV. ECN. Change ** 1341766 TUP/FSU *A 1494145 TUP/AESA *B 1773608 TUP/AESA *C 2091026 DZU/MOHD /AESA © Cypress Semiconductor Corporation, 2007-2008. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product ...

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