mc68hc705v12 Freescale Semiconductor, Inc, mc68hc705v12 Datasheet - Page 162

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mc68hc705v12

Manufacturer Part Number
mc68hc705v12
Description
M68hc05-based Mcu Hc05 Freescale Semiconductor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Byte Data Link Controller – Digital (BDLC–D)
14.6.2 Rx and Tx Shift Registers
14.6.3 Rx and Tx Shadow Registers
14.6.4 Digital Loopback Multiplexer
14.6.5 State Machine
Advance Information
The Rx shift register gathers received serial data bits from the J1850 bus
and makes them available in parallel form to the Rx shadow register.
The Tx shift register takes data, in parallel form, from the Tx shadow
register and presents it serially to the state machine so that it can be
transmitted onto the J1850 bus.
Immediately after the Rx shift register has completed shifting in a byte of
data, this data is transferred to the Rx shadow register and RDRF or
RXIFR is set (see
generated if the interrupt enable bit (IE) in BCR1 is set. After the transfer
takes place, this new data byte in the Rx shadow register is available to
the CPU interface, and the Rx shift register is ready to shift in the next
byte of data. Data in the Rx shadow register must be retrieved by the
CPU before it is overwritten by new data from the Rx shift register.
Once the Tx shift register has completed its shifting operation for the
current byte, the data byte in the Tx shadow register is loaded into the
Tx shift register. After this transfer takes place, the Tx shadow register
is ready to accept new data from the CPU when the TDRE flag in the
BSVR is set.
The digital loopback multiplexer connects RxD to either BDTxD or
BDRxD, depending on the state of the DLOOP bit in the BCR2 (see
14.7.3 BDLC Control Register
All functions associated with performing the protocol are executed or
controlled by the state machine. The state machine is responsible for
framing, collision detection, arbitration, CRC generation/checking, and
error detection. The following sections describe the BDLC’s actions in a
variety of situations.
Freescale Semiconductor, Inc.
For More Information On This Product,
Byte Data Link Controller – Digital (BDLC–D)
Go to: www.freescale.com
14.7.4 BDLC State Vector
2).
Register). An interrupt is
MC68HC705V12
Rev. 3.0

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