mc68hc705v12 Freescale Semiconductor, Inc, mc68hc705v12 Datasheet - Page 165

• Manufacturer Part Number: mc68hc705v12
• Description: M68hc05-based Mcu Hc05 Freescale Semiconductor
• Manufacturer: Freescale Semiconductor, Inc

14.6.5.5 Summary
MC68HC705V12
Transmission error
Cyclical redundancy check (CRC) error
Invalid symbol: BDLC transmits, but
Framing error
Bus short to V
Bus short to GND
BDLC receives BREAK symbol
receives invalid bits (noise)
Error Condition
DD
—
Rev. 3.0
BREAK — Break
Table 14-1. BDLC J1850 Bus Error Summary
In any case, if the bus fault is temporary, as soon as the fault is
cleared, the BDLC will resume normal operation. If the bus fault is
permanent, it may result in permanent loss of communication on the
J1850 bus. See
If a BREAK symbol is received while the BDLC is transmitting or
receiving, an invalid symbol (in BSVR) interrupt will be generated.
Reading the BSVR (see
clear this interrupt condition. The BDLC will wait for the bus to idle,
then wait for a start-of-frame (SOF) symbol.
The BDLC cannot transmit a BREAK symbol. It only can receive a
BREAK symbol from the J1850 bus.
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Byte Data Link Controller – Digital (BDLC–D)
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For invalid bits or framing symbols on non-byte boundaries, invalid
CRC error interrupt will be generated. The BDLC will wait for EOF.
The BDLC will abort transmission immediately. Invalid symbol
Invalid symbol interrupt will be generated. The BDLC will wait for end
The BDLC will not transmit until the bus is idle. Invalid symbol
Thermal overload will shut down physical interface. Fault condition is
Invalid symbol interrupt will be generated. The BDLC will wait for the
symbol interrupt will be generated. BDLC stops transmission.
interrupt will be generated.
of frame (EOF).
interrupt will be generated. EOF interrupt also must be seen before
another transmission attempt. Depending on length of the short,
LOA flag also may be set.
seen as invalid symbol flag. EOF interrupt must also be seen
before another transmission attempt.
next valid SOF.
14.7.4 BDLC State Vector
14.7.4 BDLC State Vector
Byte Data Link Controller – Digital (BDLC–D)
BDLC Function
Register.
BDLC Protocol Handler
Advance Information
Register) will