mc68hc705v12 Freescale Semiconductor, Inc, mc68hc705v12 Datasheet - Page 92

• Manufacturer Part Number: mc68hc705v12
• Description: M68hc05-based Mcu Hc05 Freescale Semiconductor
• Manufacturer: Freescale Semiconductor, Inc

Core Timer
8.5 Core Timer Counter Register
8.6 Core Timer during Wait Mode
Advance Information
Address:
The core timer counter register (CTCR) is a read-only register which
contains the current value of the 8-bit ripple counter at the beginning of
the timer chain. This counter is clocked by the CPU clock (E/4) and can
be used for various functions including a software input capture.
Extended time periods can be attained using the TOF function to
increment a temporary RAM storage location, thereby simulating a 16-bit
(or more) counter.
The power-on cycle clears the entire counter chain and begins clocking
the counter. After 4064 cycles, the power-on reset circuit is released
which again clears the counter chain and allows the device to come out
of reset. At this point, if RESET is not asserted, the timer will start
counting up from 0 and normal device operation will begin. When
RESET is asserted any time during operation (other than POR), the
counter chain will be cleared.
The CPU clock halts during wait mode, but the timer remains active. If
interrupts are enabled, a timer interrupt will cause the processor to exit
wait mode. The COP watchdog timer, derived from the core timer,
remains active in wait mode, if enabled via the MOR.
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
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TMR7
Bit 7
Figure 8-3. Core Timer Counter Register (CTCR)
0
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= Unimplemented
TMR6
6
0
Core Timer
TMR5
5
0
TMR4
4
0
TMR3
3
0
MC68HC705V12
TMR2
2
0
TMR1
1
0
—
Rev. 3.0
TMR0
Bit 0
0