gc80c510 CORERIVER Semiconductor, gc80c510 Datasheet - Page 201
gc80c510
Manufacturer Part Number
gc80c510
Description
Eprom/rom 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
1.GC80C510.pdf
(211 pages)
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13.26 WDCON (D8h) : Watchdog Control Register
MiDAS1.1 Family
Symbol
Bit No.
WTRF
WDIF
WD1
WD0
Watchdog Timer Mode Select
Mode
Watchdog Interrupt Flag.
Watchdog Timer Reset Flag.
R/W(1)
EWT
and Enable Watchdog Timer Reset bit EWT (WDCON.1) indicates if a watchdog timer
event has occurred and what action will be taken. This bit must be cleared in software
before exiting the interrupt service routine, or another interrupt will be generated.
Setting this bit in software will generate a watchdog interrupt if enabled.
interrogated to determine if a reset was caused by watchdog timer reset. It is cleared
by a power-on-reset, but otherwise must be cleared by software before the next reset
of any kind or software may erroneously determine that a watchdog timer reset has
occurred. Setting this bit in software will not generate a watchdog timer reset. If the
EWT bit is cleared, the watchdog timer will have no effect on this bit.
WD1
0
1
2
3
This bit, in conjunction with the Watchdog timer interrupt enable bit EWDT (EIE.4)
(EWT
X
0
0
1
1
When set, this bit indicates that a watchdog timer reset has occurred. It is typically
7
WD1
EWDT
0
0
1
1
WDCON.1, EWDT
X
0
1
0
1
R/W(1)
WD0
6
WD0
WDIF
0
1
0
1
0
1
1
1
1
R/W(0)
5
-
No WDT (Watchdog timer) event has occurred.
WDT time-out has expired. No interrupt has been generated.
WDT interrupt has occurred.
WDT time-out has expired. No interrupt has been generated.
WDT reset will occur after 512 clocks if RWT is not strobed.
WDT interrupt has occurred.
WDT reset will occur after 512 clocks if RWT is not set.
Page 201 of 211
Interrupt Time-Out
EIE.4, WDIF
132X 2
16 X 2
1 X 2
4 X 2
R/W(1)
4
-
Description
16
16
16
16
clocks
clocks
clocks
clocks
R/W(0)
WDIF
WDCON.3)
3
Description
R/W(0)
WTRF
2
16 X 2
32 X 2
1 X 2
4 X 2
Reset Time-Out
R/W(0)
16
16
16
16
EWT
1
+ 256 clocks
+ 256 clocks
+ 256 clocks
+ 256 clocks
R/W(0)
RWT
0
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