dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 46
dp83630sqx
Manufacturer Part Number
dp83630sqx
Description
Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83630SQX.pdf
(126 pages)
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Bit
15
14
13
12
11
10
14.1.1 Basic Mode Control Register (BMCR)
9
8
7
AUTO-NEGOTIATION
AUTO-NEGOTIATION
SPEED SELECTION
COLLISION TEST
DUPLEX MODE
POWER DOWN
LOOPBACK
RESTART
Bit Name
ISOLATE
ENABLE
RESET
TABLE 14. Basic Mode Control Register (BMCR), address 0x00
Strap, RW
Strap, RW
Strap, RW
0, RW/SC
0, RW/SC
Default
0, RW
0, RW
0, RW
0, RW
Reset:
1 = Initiate software Reset / Reset in Process.
0 = Normal operation.
This bit, which is self-clearing, returns a value of one until the reset process is
complete. The configuration is re-strapped.
Loopback:
1 = Loopback enabled.
0 = Normal operation.
The loopback function enables MII transmit data to be routed to the MII receive data
path.
Setting this bit may cause the descrambler to lose synchronization and produce a 500
µs “dead time” before any valid data will appear at the MII receive outputs.
Speed Select:
When auto-negotiation is disabled writing to this bit allows the port speed to be
selected.
1 = 100 Mb/s.
0 = 10 Mb/s.
Auto-Negotiation Enable:
Strap controls initial value at reset.
If FX is enabled (FX_EN = 1), then this bit will be reset to 0.
1 = Auto-Negotiation Enabled - bits 8 and 13 of this register are ignored when this bit
is set.
0 = Auto-Negotiation Disabled - bits 8 and 13 determine the port speed and duplex
mode.
Power Down:
1 = Power down.
0 = Normal operation.
Setting this bit powers down the PHY. Only the register block is enabled during a
power down condition. This bit is ORd with the input from the PWRDOWN_INT pin.
When the active low PWRDOWN_INT pin is asserted, this bit will be set.
Isolate:
1 = Isolates the Port from the MII with the exception of the serial management.
0 = Normal operation.
Restart Auto-Negotiation:
1 = Restart Auto-Negotiation. Re-initiates the Auto-Negotiation process. If Auto-
Negotiation is disabled (bit 12 = 0), this bit is ignored. This bit is self-clearing and will
return a value of 1 until Auto-Negotiation is initiated, whereupon it will self-clear.
Operation of the Auto-Negotiation process is not affected by the management entity
clearing this bit.
0 = Normal operation.
Duplex Mode:
When auto-negotiation is disabled writing to this bit allows the port Duplex capability
to be selected.
1 = Full Duplex operation.
0 = Half Duplex operation.
Collision Test:
1 = Collision test enabled.
0 = Normal operation.
When set, this bit will cause the COL signal to be asserted in response to the assertion
of TX_EN within 512-bit times. The COL signal will be de-asserted within 4-bit times
in response to the de-assertion of TX_EN.
46
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