dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 61

• Manufacturer Part Number: dp8344b
• Description: Biphase Communications Processor?bcp
• Manufacturer: National Semiconductor Corporation

3 0 Transceiver
high and low The off level corresponds with 0 mA current
being driven the high level is nominally 62 5 mA
b
b
minated transmission line the resultant voltages impressed
at the driver are off level is 0V low level is 0 32V
high level is 1 6V
switching of the A and B phases and the three levels A bi-
modal constant current source for each phase can be built
that has a TTL level interface for the BCP
Receiver Circuits
The pseudo-differential mode of the twinax signals make
receiver design requirements somewhat different than the
coax 3270 world Hence the analog receiver on the BCP is
not well suited to receiving twinax data The BCP provides
both analog inputs to an on-board comparator circuit as well
as a TTL level serial data input DATA-IN The sense of this
serial data can be inverted by the BCP by asserting RIN
The external receiver circuit must be designed with care to
ensure reliable decoding of the bit-stream in the worst envi-
ronment Signals as small as 100 mV must be detected In
order to receive the worst case signals the input level
switching threshold or hysteresis for the receiver should be
nominally 29 mV
worst case signal level of 100 mV
before transitioning
TMR 4
30% and the low level is nominally 12 5 mA
30% When these currents are applied to a properly ter-
g
g
20% This value allows the steady state
20% The interface must provide for
(Continued)
g
66% of its amplitude
FIGURE 3-15 5250 Line Interface Schematic
g
a
a
20%
20%
20%
61
To achieve this a differential comparator with complemen-
tary outputs can be applied such as the National LM361
The complementary outputs are useful in setting the hyster-
esis or switching threshold to the appropriate levels The
LM361 also provides excellent common mode noise rejec-
tion and a low input offset voltage Low input leakage cur-
rent allows the design of an extremely sensitive receiver
without loading the transmission line excessively
In addition to good analog design techniques a low pass
filter with a roll-off of approximately 1 MHz should be ap-
plied to both the A and B phases This filter essentially con-
ducts high frequency noise to the opposite phase effective-
ly making the noise common mode and easily rejectable
Layout considerations for the LM361 include proper bypass-
ing of the
possible traces from the pins to 0 1 mF ceramic capacitors
Using surface mount chip capacitors reduces lead induc-
tance and is therefore preferable in this case Keeping the
input traces as short and even in length is also important
The intent is to minimize inductance effects as well and
standardize those effects on both inputs The LM361 should
have as much ground plane under and around it as possi-
ble Trace widths for the input signals especially should be
as wide as possible 0 1 inch is usually sufficient Finally
keep all associated discrete components nearby with short
routing and good ground supply connections
For a more detailed explanation of the 5250 line interface
see application note ‘‘Interfacing the DP8344 to Twinax ’’
g
12V supplies at the chip itself with as short as
TL F 9336 – G4