w681512 Winbond Electronics Corp America, w681512 Datasheet

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w681512

Manufacturer Part Number
w681512
Description
Single-channel Voiceband Codec
Manufacturer
Winbond Electronics Corp America
Datasheet

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W681512
SINGLE-CHANNEL VOICEBAND CODEC
Data Sheet
Publication Release Date: September, 2007
- 1 -
Revision C14

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w681512 Summary of contents

Page 1

... W681512 SINGLE-CHANNEL VOICEBAND CODEC Data Sheet Publication Release Date: September, 2007 - 1 - Revision C14 ...

Page 2

... VoIP, Voice over Networks equipment • Digital telephone and communication systems • Wireless Voice devices • DECT/Digital Cordless phones • Broadband Access Equipment • Bluetooth Headsets • Fiber-to-curb equipment ) RMS • Enterprise phones • Digital Voice Recorders and A-Law - 2 - W681512 W681512 W681512 accepts seven ...

Page 3

... M ve ace Tra Int PC ns erf M mit ace 512 kHz 256 kHz 256 kHz 8 kHz 8 kHz Power Conditioning Power Conditioning - 3 - W681512 PAO+ PAO- PAI G.712 CODEC G.712 CODEC G.712 CODEC RO- μ μ μ RO+ RO G.711 G.711 G.711 /A -Law /A -Law /A -Law AO ...

Page 4

... Analog Input and Output Amplifier Parameters.........................................................................24 10.5. Digital I/O ................................................................................................................................... 26 10.5.1. μ-Law Encode Decode Characteristics...............................................................................26 10.5.2. A-Law Encode Decode Characteristics ..............................................................................27 10.5.3. PCM Codes for Zero and Full Scale ...................................................................................28 10.5.4. PCM Codes for 0dBm0 Output ...........................................................................................28 11. TYPICAL APPLICATION CIRCUIT ................................................................................................. 29 12. PACKAGE SPECIFICATION .......................................................................................................... 31 12.1. 20L SOG (SOP)-300mil ............................................................................................................. W681512 ...

Page 5

... SSOP-209 mil ..................................................................................................................... 33 12.3. 20L TSSOP - 4.4X6.5mm .......................................................................................................... 35 13. ORDERING INFORMATION........................................................................................................... 36 14. VERSION HISTORY ....................................................................................................................... 37 Publication Release Date: April, 2007 - 5 - W681512 Revision C14 ...

Page 6

... SINGLE SINGLE CHANNEL CHANNEL CODEC CODEC SOG/SSOP/TSSOP - 6 - W681512 AI+ AI- AO μ μ /A /A-Law FST PCMT BCLKT BCLKT MCLK MCLK ...

Page 7

... AG with a 0.1μF ceramic capacitor The IDL mode is selected when this pin is tied the part is powered up. When tied with a 0.01μF to 0.1 μF capacitor. This pin SS Publication Release Date: April, 2007 - 7 - W681512 voltage A-Law DD Revision C14 ...

Page 8

... A-Law compander. The μ-Law and A-Law companders are designed to comply with the specifications of the ITU-T G.711 recommendation. The block diagram in section 3 shows the main components of the W681512. The chip consists of a PCM interface, which can process long and short frame sync formats, as well as GCI and IDL formats. ...

Page 9

... PAO+ and PAO- pins. By using external resistors (see section 11 for examples), various gain settings and the AI- pin is selected as an input when AI+ is tied Input Amplifier Powered Down Powered Up Powered Down Table 7.1 Input Amplifier Modes of operation Format A-Law μ-Law - 9 - W681512 Input AO AI+, AI- AI- Publication Release Date: April, 2007 Revision C14 (see SS ...

Page 10

... P M OWER ANAGEMENT 7.3.1. Analog and Digital Supply The power supply for the analog and digital parts of the W681512 must be 5V +/- 10%. This supply voltage is connected to the V DD ceramic capacitor. 7.3.2. Analog Ground Reference Voltage Output The analog ground reference voltage is available for external reference at the V through a 0.01 μ ...

Page 11

... The data transmit pin PCMT will go back to the high impedance state halfway through the LSB. The Short Frame Sync operation of the W681512 is based on an 8-bit data word. When receiving data on the PCMR pin, the data is clocked in on the first falling edge after the falling edge that coincides with the Frame Sync signal ...

Page 12

... MCLK and BCLK pin clock signals are still present, the W681512 will enter the low power standby mode. Another way to power down is to set the PUI pin to LOW. When the system needs to be powered up again, the PUI pin needs to be set to HIGH and the Frame Sync pulse needs to be present ...

Page 13

... T T BDTD FRFH DRH Figure 8.1 Long Frame Sync PCM Timing - 13 - W681512 T T RISE FALL T FSL T T BCKH BCKL HID HID BCK D0 LSB T FSL T T BCKH BCKL ...

Page 14

... DRH Edge Table 8.1 Long Frame Sync PCM Timing Parameters must be at least ≥ FSL BCK MIN TYP --- BCK 64 --- 50 --- 50 --- 20 --- 80 --- 50 --- --- --- --- --- 10 --- 20 --- 80 --- 50 --- 0 --- 50 --- - 14 - W681512 MAX UNIT --- kHz sec 4096 kHz --- ns --- ns --- ns --- ns --- --- ns --- ns --- ns --- ns --- ns ...

Page 15

... RISE T T MCK BDTD LSB LSB T DRH - 15 - W681512 FALL T T BCKH BCKL BCK HID T T BCKH BCKL BCK Publication Release Date: April, 2007 Revision C14 ...

Page 16

... Valid PCMR to BCLKR Falling Edge Setup Time DRS T PCMR Hold Time from BCLKR Falling Edge DRH Table 8.2 Short Frame Sync PCM Timing Parameters MIN --- W681512 TYP MAX UNIT 8 --- kHz --- 4096 kHz --- --- ns --- --- ns --- --- ns --- --- ns --- --- ...

Page 17

... LSB MSB T T DRH DRS DRH LSB MSB BCH = 1 B2 Channel Figure 8.3 IDL PCM Timing MIN 256 Table 8.3 IDL PCM Timing Parameters - 17 - W681512 T BCKH BCKL BCK T T HID BDTD D1 D0 LSB D1 D0 LSB TYP ...

Page 18

... BDTD MSB LSB DRH DRS LSB MSB BCH = 0 BCH = 1 B1 Channel B2 Channel Figure 8.4 GCI PCM Timing Table 8.4 GCI PCM Timing Parameters - 18 - W681512 T T BCKH BCKL HID BDTD BCK D1 D0 LSB DRH D1 D0 LSB MIN TYP MAX ...

Page 19

... Rise Time for All Digital Signals RISE T Fall Time for All Digital Signals FALL Table 8.5 General PCM Timing Parameters TYP MIN --- 256 512 1536 1544 2048 2560 4096 45% 50 --- 50 --- 50 --- 50 --- --- --- --- --- Publication Release Date: April, 2007 - 19 - W681512 MAX UNIT --- kHz 55% --- ns --- ns --- ns --- Revision C14 ...

Page 20

... ONDITIONS Condition Industrial operating temperature Supply voltage ( Ground voltage ( Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. R ATINGS - 20 - W681512 Value 0 150 - +150 0.3V 0.3V – ...

Page 21

... Load FST & FSR =V ss PUI=V DD PUI <V < <PCMT< High Z State PCMT High 5 W681512 (2) (1) Min Typ 2.4 V – 0.1 Publication Release Date: April, 2007 Revision C14 (2) Max Units 0 0 100 μ ...

Page 22

... Hz -50 to –55 dBm0 relative to –10 dBm0 AIN ARAMETERS CONDITION TYP. 1.096 0.775 1.579 1.573 0 0 =+70°C A =+85°C A --- --- --- --- --- --- --- --- --- --- --- --- --- - 22 - W681512 ; AG TRANSMIT RECEIVE (A/D) (D/A) MIN. MAX. MIN. MAX. --- --- --- --- --- --- --- --- --- --- --- --- -0.25 +0.25 -0.25 +0.25 -0.03 +0.03 -0.03 +0.03 -0.05 +0.05 -0.05 +0.05 ...

Page 23

... Hz to 7600 Hz --- 7600 Hz to 8400 Hz --- 8400 Hz to 100000 Hz --- 300 to 3000 Hz --- Two tones --- --- 1200Hz --- 500 Hz --- 600 Hz --- 1000 Hz --- 2600 Hz --- 2800 Hz --- μ-Law; C-message --- --- A-Law; Psophometric - 23 - W681512 ; AG RECEIVE (D/A) TYP. MAX. MIN. TYP. --- --- 34 --- --- --- 36 --- --- --- 30 --- --- --- 25 --- --- --- 34 --- --- --- 36 --- --- --- ...

Page 24

... IN,PAI R PAI to V IN,PAI AG GBW PAO- no load PI V PAO+ to PAO- OFF,PO R PAO+, PAO- differentially LDPO C PAO+, PAO- differentially LDPO + 0.7 ≤PAO- or PAO+≤ OUTPO PAO+ to PAO W681512 ; AG MIN. TYP. MAX. ±25 --- --- ±0.1 ±1.0 --- 10 --- --- --- 1.2 --- V DD --- 60 --- 2150 --- 95 --- -24 0.5 --- ...

Page 25

... SYM. CONDITION G R =300Ω, +3dBm0, 1 kHz PAO+ to PAO =300Ω =100nF + 100Ω =100nF + 20Ω LD PSRR kHz kHz - 25 - W681512 MIN. TYP. MAX. -0 --- --- 40 --- --- 40 --- 40 55 --- --- 40 --- Publication Release Date: April, 2007 Revision C14 UNIT ...

Page 26

... D4 D3 Chord Chord Step Step W681512 Normalized Decode Levels Step Step 8031 4191 2079 1023 495 231 ...

Page 27

... Digital code includes inversion of all even number bits Digital Code Chord Chord Step Step W681512 Normalized Decode Levels Step Step 4032 2112 1056 528 264 132 1 ...

Page 28

... Step bits Sign bit (D3,D2,D1,D0) 001 1110 000 1011 000 1011 001 1110 001 1110 000 1011 000 1011 001 1110 - 28 - W681512 A-Law Chord bits Step bits (D7) (D6,D5,D4) (D3,D2,D1,D0) 1 010 1010 1 101 0101 0 101 0101 0 010 1010 A-Law Chord bits Step bits ...

Page 29

... AO 27K 18 AI- 19 AI+ 27K 27K 20 VAG 2 RO- 1 RO+ 27K 3 PAI 27K 4 PAO- 5 PAO+ 100 uF W681512 - 29 - W681512 VDD 0 KHz Frame Sy nc FST 12 BCLKT 13 2.048 MHz PCMT Bit Clock 11 MCLK PCM OUT 8 PCMR 9 PCM IN BCLKR 7 FSR 16 MODE SELECT u/A 10 PUI POWER CONTROL VDD 0 ...

Page 30

... VDD U5 27K AI- 19 AI+ 20 VAG 2 RO- 27K 1 RO+ 3 PAI 27K 4 PAO- 5 PAO+ W681512 - 30 - W681512 0 KHz Frame Sy nc FST 12 13 2.048 MHz Bit Clock 11 PCM OUT 8 9 PCM IN 7 FSR 16 MODE SELECT u/A 10 PUI POWER CONTROL 0 KHz Frame Sy nc FST ...

Page 31

... PACKAGE SPECIFICATION 12.1. 20L SOG (SOP)-300 SMALL OUTLINE PACKAGE (SAME AS SOG & SOIC) DIMENSIONS SEATING PLANE MIL W681512 0.25 GAUGE PLANE Publication Release Date: September, 2005 Revision C13 ...

Page 32

... DIMENSION (MM) SYMBOL MIN. MAX. A 2.35 2.65 A1 0.10 0.30 b 0.33 0.51 c 0.23 0.32 E 7.40 7.60 D 12.60 13.00 e 1.27 BSC H 10.00 10. 0.10 L 0.40 1.27 0 0º 8º W681512 DIMENSION (INCH) MIN. MAX. 0.093 0.104 0.004 0.012 0.013 0.020 0.009 0.013 0.291 0.299 0.496 0.512 0.050 BSC 0.394 0.419 - 0.004 0.016 0.050 0º 8º ...

Page 33

... SSOP-209 MIL SHRINK SMALL OUTLINE PACKAGE DIMENSIONS SEATING PLANE Publication Release Date: September, 2005 - 33 - W681512 DTEAIL SEATING PLANE θ DETAIL A Revision C13 ...

Page 34

... A2 1.65 1. 6.90 7.20 E 5.00 5.30 H 7.40 7. 0.65 L 0. 0º - DIMENSION (INCH) MAX. MIN. NOM. 2. 0.002 - 1.85 0.065 0.069 0.38 0.009 - 0.25 0.004 - 7.50 0.272 0.283 5.60 0.197 0.209 8.20 0.291 0.307 - - 0.0256 0.95 0.021 0.030 - - 0.050 0. 8º W681512 MAX. 0.079 - - 0.015 0.010 0.295 0.220 0.323 - 0.037 - 0.004 8º ...

Page 35

... BSC 6.50 6.60 0.252 0.60 0.75 0.020 1.00 REF - 0.30 0.007 0.65 BSC - 0.20 0.004 - 8º 0º Publication Release Date: September, 2005 - 35 - W681512 DIMENSION (INCH) NOM. MAX. - 0.047 - 0.006 0.035 0.041 0.173 0.177 .252 BSC 0.256 0.260 0.024 0.030 0.039 REF - 0.012 0.026 BSC - 0.008 - 8º 0.004 BASIC ...

Page 36

... ORDERING INFORMATION W681512_ _ Product Family W681512 Product When ordering W681512 series devices, please refer to the following part numbers. *All Pb packages will be available for a limited time. Thus, Pb-free packages are strongly recommended. Winbond Part Number Description Package Material: Blank = Standard Package G = Pb-free Package ...

Page 37

... Improved Applications Diagram Capilatized Logic HIGH/LOW Added reference to V RMS 31 SOP Package diagram legible 33 SSOP Package diagram legible 35 TSSOP Package diagram legible 36 Removed Pb TSSOP Package 36 Footnote on Pb parts limited availability Important Notice - 37 - W681512 DESCRIPTION Publication Release Date: September, 2005 Revision C13 ...

Page 38

... The information contained in this datasheet may be subject to change without notice the responsibility of the customer to check the Winbond USA website (www.winbond-usa.com) periodically for the latest version of this document, and any Errata Sheets that may be generated between datasheet revisions W681512 ...

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