isp1760 NXP Semiconductors, isp1760 Datasheet - Page 13

• Manufacturer Part Number: isp1760
• Description: Hi-speed Universal Serial Bus Host Controller For Embedded Applications
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 13257
Product data sheet
7.2.1 General considerations
7.2 Host Controller buffer memory block
The internal addressable Host Controller buffer memory is 63 kbytes. The 63-kbyte
effective memory size is the result of subtracting the size of registers (1 kbyte) from the
total addressable memory space defined in the ISP1760 (64 kbytes). This is the optimized
value for achieving the highest performance with a minimal cost.
The ISP1760 is a slave Host Controller. This means that it does not need access to the
local bus of the system to transfer data from the memory of the system to the ISP1760
internal memory, unlike the case of the original PCI Hi-Speed USB Host Controllers.
Therefore, correct data must be transferred to both the Philips Transfer Descriptor (PTD)
area and the payload area by Parallel I/O (PIO) (CPU access) or programmed DMA.
The ‘slave-host’ architecture ensures better compatibility with most of the processors
present in the market today because not all processors allow a ‘bus-master’ on the local
bus. It also allows better load balancing of the processor’s local bus because only the
internal bus arbiter of the processor controls the transfer of data dedicated to USB. This
prevents the local bus from being busy when other more important transfers may be in the
queue; and therefore achieving a ‘linear’ system data flow that has less impact on other
processes running at the same time.
The considerations mentioned are also the main reason for implementing the prefetching
technique, instead of using a READY signal. The resulting architecture avoids ‘freezing’ of
the local bus (by asserting READY), enhancing the ISP1760 memory access time, and
avoiding introduction of programmed additional wait states. For details, see
and
Fig 3. Internal hub.
Section
8.3.8.
Rev. 01 — 8 November 2004
PORT1
AND POLLING USING
INTERNAL HUB (TT)
ENUMERATION
ACTUAL PTDs
ROOT HUB
PORTSC1
PORT2
EHCI
Embedded Hi-Speed USB host controller
PORT3
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
EXTERNAL
PORTS
004aaa513
ISP1760
Section 7.3
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