sja1000t-n1 NXP Semiconductors, sja1000t-n1 Datasheet - Page 52
sja1000t-n1
Manufacturer Part Number
sja1000t-n1
Description
Stand-alone Can Controller
Manufacturer
NXP Semiconductors
Datasheet
1.SJA1000T-N1.pdf
(68 pages)
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Philips Semiconductors
If the SJA1000 is in the sleep mode a recessive level is output on the TX0 and TX1 pins with respect to the contents
within the output control register. If the SJA1000 is in the reset state (reset request = HIGH) or the external reset pin RST
is pulled LOW the outputs TX0 and TX1 are floating.
The transmit output stage is able to operate in different modes. Table 47 shows the output control register settings.
Table 47 Interpretation of OCMODE bits
Note
1. In test output mode TXn will reflect the bit, detected on RX pins, with the next positive edge of the system clock.
6.5.3.1
In normal output mode the bit sequence (TXD) is sent via TX0 and TX1. The voltage levels on the output driver pins TX0
and TX1 depend on both the driver characteristic programmed by OCTPx, OCTNx (float, pull-up, pull-down, push-pull)
and the output polarity programmed by OCPOLx.
2000 Jan 04
handbook, full pagewidth
OCMODE1
Stand-alone CAN controller
TN1, TN0, TP1 and TP0 are configured in accordance with the setting of OCR.
0
0
1
1
Normal output mode
OCMODE0
0
1
0
1
bi-phase output mode
test output mode; note 1
normal output mode
clock output mode
TXCLK
TXD
OCTP1
OCTN1
OCPOL1
OCTP0
OCTN0
OCPOL0
OCMODE1
OCMODE0
Fig.14 Transceiver input/output control logic.
TRANSMIT
LOGIC
52
DESCRIPTION
V DD
V DD
V SS
V SS
TP0
TN0
TP1
TN1
MGK629
TX0
TX1
transmitter
Product specification
SJA1000
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