lan9420 Standard Microsystems Corp., lan9420 Datasheet - Page 111

• Manufacturer Part Number: lan9420
• Description: Lan9420/lan9420i Single-chip Ethernet Controller With Hp Auto-mdix Support And Pci Interface
• Manufacturer: Standard Microsystems Corp.

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i
4.3.7
31:23
19:16
BITS
22
21
RESERVED
Transmit Threshold Mode (TTM)
This bit controls the transmit threshold used by the MIL. TTM is used by
the MIL, not by the DMAC. This bit is used when the SF bit
(DMAC_CONTROL[21]) is cleared.
TTM selects between 100Mbps and 10Mbps threshold values. When TTM
= 1, 10Mbps values are selected. When TTM = 0, 100Mbps values are
selected. The Host system can program the Transmit threshold by setting
the Threshold Control bits (TR - bits [15:14]).
TTM functions in conjunction with the TR field (DMAC_CONTROL[15:14]).
Please refer to the description of the TR field for a more complete
explanation of the TTM bit.
Store and Forward (SF)
When set, this bit instructs the MAC interface layer (MIL) to store a frame
of transmit data before forwarding it to its final destination. This bit is not
used by the DMAC, but is used to define the MIL operation mode.
If this bit is set, the MIL buffers the entire frame before initiating
transmission to the MAC. TTM and TR (see bits 22, 15 and 14 below) are
treated as Don’t Cares once the SF mode is selected.
If this bit is cleared, the MIL initiates transmission before it receives the
entire frame from the DMAC. TTM and TR (see bits 22, 15 and 14 below)
determine when the MIL initiates the transmission. If the DMAC cannot
provide the remainder of the frame at the rate at which the MIL transmits,
there is a risk of an Underrun Error.
Note:
RESERVED
DMA Controller Control (Operation Mode) Register (DMAC_CONTROL)
This register establishes the RX and TX operating modes and commands. This should be the last
DCSR written as part of initialization.
Offset:
This bit must be set when using the TXCOE. Refer to
3.5.6, "Transmit Checksum Offload Engine (TXCOE)," on page 63
for additional information.
DESCRIPTION
0018h
DATASHEET
111
Size:
Section
32 bits
TYPE
R/W
R/W
RO
RO
Revision 1.1 (03-31-08)
DEFAULT
0b
0b
-
-