lan9420 Standard Microsystems Corp., lan9420 Datasheet - Page 123

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lan9420

Manufacturer Part Number
lan9420
Description
Lan9420/lan9420i Single-chip Ethernet Controller With Hp Auto-mdix Support And Pci Interface
Manufacturer
Standard Microsystems Corp.
Datasheet

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Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i
BITS
1-0
2
Receiver Enable (RXEN)
When set (1), the MAC’s receiver is enabled and will receive frames from
the internal PHY. When reset, the MAC’s receiver is disabled and will not
receive any frames from the internal PHY.
Note:
Note:
RESERVED
In order to successfully enable the receive path, the RX DMAC
must be enabled by setting the Start/Stop Receive bit (SR) bit of
the
(DMAC_CONTROL)
RXEN).
In order to successfully disable the receive path, the receiver must
be disabled (by clearing RXEN) prior to disabling the RX DMAC
(by clearing the Start/Stop Receive bit (SR) bit of the
Controller Control (Operation Mode) Register
(DMAC_CONTROL)). Otherwise, RX DMA will not stop
(DMAC_STATUS will continue to show the Receive Process State
(RS) as Running and Receive Process Stopped (RPS) does not
assert).
DMA Controller Control (Operation Mode) Register
DESCRIPTION
prior to enabling the receiver (by setting
DATASHEET
123
DMA
TYPE
R/W
RO
Revision 1.1 (03-31-08)
DEFAULT
0b
-

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