lan9420 Standard Microsystems Corp., lan9420 Datasheet - Page 125

• Manufacturer Part Number: lan9420
• Description: Lan9420/lan9420i Single-chip Ethernet Controller With Hp Auto-mdix Support And Pci Interface
• Manufacturer: Standard Microsystems Corp.

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i
4.4.3
BITS
31:0
Physical Address [31:0]
This field contains the lower 32 bits (32:0) of the Physical Address of this
MAC device.
MAC Address Low Register (ADDRL)
This register contains the lower 32 bits of the physical address of the MAC, where ADDRL[7:0] is the
first octet of the Ethernet frame.
Table 4.6
reception of the Ethernet physical address.
ADDRL, ADDRH
As an example, if the desired Ethernet physical address is 12-34-56-78-9A-BC, the ADDRL and
ADDRH registers would be programmed as shown in
load this configuration from the EEPROM are shown in
page
ADDRL[23:16]
ADDRL[31:24]
ADDRH[15:8]
ADDRL[15:8]
ADDRH[7:0]
ADDRL[7:0]
31.
Offset:
below illustrates the byte ordering of the ADDRL and ADDRH registers with respect to the
Figure 4.2 Example ADDRL, ADDRH Address Ordering
Table 4.6 ADDRL, ADDRH Byte Ordering
31
31
0x78
DESCRIPTION
0088h
xx
24
24
23
DATASHEET
23
0x56
xx
ADDRH
ADDRL
16
16
125
15
15
ORDER OF RECEPTION ON ETHERNET
0xBC
0x34
Size:
8
8
Figure
7
7
0x9A
0x12
Section 3.3.5.1, "EEPROM Format," on
4.2. The values required to automatically
0
0
32 bits
2
3
4
5
6
1
nd
rd
st
th
th
th
TYPE
R/W
Revision 1.1 (03-31-08)
DEFAULT
32‘hF