lan9420 Standard Microsystems Corp., lan9420 Datasheet - Page 145
lan9420
Manufacturer Part Number
lan9420
Description
Lan9420/lan9420i Single-chip Ethernet Controller With Hp Auto-mdix Support And Pci Interface
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN9420.pdf
(169 pages)
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Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i
4.5.9
BITS
15:8
7-5
4-0
MODE
000b
001b
010b
100b
101b
011b
110b
111b
RESERVED
MODE
PHY Mode of operation. Refer to
PHYADD
PHY Address. The PHY Address is used for the SMI address.
Special Modes
10BASE-T Half Duplex. Auto-negotiation disabled.
10BASE-T Full Duplex. Auto-negotiation disabled.
100BASE-TX Half Duplex. Auto-negotiation
disabled. CRS is active during Transmit & Receive.
100BASE-TX Full Duplex. Auto-negotiation
disabled. CRS is active during Receive.
100ase-TX Half Duplex is advertised. Auto-
negotiation enabled. CRS is active during Transmit
& Receive.
Repeater mode. Auto-negotiation enabled.
100BASE-TX Half Duplex is advertised. CRS is
active during Receive.
RESERVED - Do not set LAN9420/LAN9420i in this
mode.
All capable. Auto-negotiation enabled.
Index (In Decimal):
MODE DEFINITIONS
DESCRIPTION
18
Table 4.8 MODE Control
Table 4.8
DATASHEET
for more details.
145
Size:
DEFAULT REGISTER BIT VALUES
REGISTER 0
[13,12,8]
16 bits
X1X
000
001
100
101
110
110
N/A
NASR
NASR
TYPE
R/W
R/W
RO
Revision 1.1 (03-31-08)
REGISTER 4
[8,7,6,5]
0100
0100
1111
N/A
N/A
N/A
N/A
N/A
DEFAULT
00001b
111b
-
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