lan9420 Standard Microsystems Corp., lan9420 Datasheet - Page 64

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lan9420

Manufacturer Part Number
lan9420
Description
Lan9420/lan9420i Single-chip Ethernet Controller With Hp Auto-mdix Support And Pci Interface
Manufacturer
Standard Microsystems Corp.
Datasheet

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Revision 1.1 (03-31-08)
3.5.6.1
3.5.7
3.6
31:28
27:16
15:12
BITS
11:0
10/100 Ethernet PHY
Note: The TX checksum preamble must be DWORD-aligned.
Note: When the TXCOE is enabled, the MAC interface layer (MIL) must be operating in store-and-
TX Checksum Calculation
The TX checksum calculation is performed using the same operation as the RX checksum, with the
exception that the calculation starts as indicated by the preamble, and the transmitted checksum is the
one’s-compliment of the final calculation.
MAC Control and Status Registers (MCSR)
Please refer to
description of the MCSR.
LAN9420/LAN9420i integrates an IEEE 802.3 Physical Layer for Twisted Pair Ethernet applications
(PHY). The PHY can be configured for either 100 Mbps (100BASE-TX) or 10 Mbps (10BASE-T)
Ethernet operation.
The PHY block includes:
Functionally, the PHY can be divided into the following sections:
RESERVED
TXCSLOC - TX Checksum Location
This field specifies the byte offset where the TX checksum will be inserted in the TX packet. The
checksum will replace two bytes of data starting at this offset.
Note:
RESERVED
TXCSSP - TX Checksum Start Pointer
This field indicates start offset, in bytes, where the checksum calculation will begin in the associated
TX packet.
Note:
Support for auto-negotiation
Automatic polarity detection and correction
HP Auto-MDIX
Energy detect
Duplex, link activity and speed indicator LEDs
Minimal external components are required for the utilization of the integrated PHY
100BASE-TX transmit and receive
10BASE-T transmit and receive
Internal MII interface to the Ethernet Media Access Controller (MAC)
forward mode (i.e., the SF bit must be set in DMAC_CONTROL register).
The TX checksum cannot be inserted in the MAC header (first 14 bytes) or in the last 4
bytes of the TX packet.
The data checksum calculation must not begin in the MAC header (first 14 bytes) or in
the last 4 bytes of the TX packet.
Section 4.4, "MAC Control and Status Registers (MCSR)," on page 119
Table 3.20 TX Checksum Preamble
Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
DATASHEET
64
DESCRIPTION
SMSC LAN9420/LAN9420i
for a complete
Datasheet

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