saf1761 NXP Semiconductors, saf1761 Datasheet - Page 14
saf1761
Manufacturer Part Number
saf1761
Description
Hi-speed Universal Serial Bus On-the-go Controller
Manufacturer
NXP Semiconductors
Datasheet
1.SAF1761.pdf
(166 pages)
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7. Functional description
SAF1761_1
Product data sheet
7.1 SAF1761 internal architecture: advanced NXP slave host controller
and hub
The EHCI block and the Hi-Speed USB hub block are the main components of the
advanced NXP slave host controller.
The EHCI is the latest generation design, with improved data bandwidth. The EHCI in the
SAF1761 is adapted from
Universal Serial Bus Rev.
The internal Hi-Speed USB hub block replaces the companion host controller block used
in the original architecture of a PCI Hi-Speed USB host controllers to handle full-speed
and low-speed modes. The hardware architecture in the SAF1761 is simplified to help
reduce cost and development time, by eliminating the additional work involved in
implementing the OHCI software required to support full-speed and low-speed modes.
Figure 3
EHCI that has an internal port, the root hub port (not available externally), on which the
internal hub is connected. The three external ports are always routed to the internal hub.
The internal hub is a Hi-Speed USB (USB 2.0) hub including the TT.
Remark: The root hub must be enabled and the internal hub must be enumerated.
Enumerate the internal hub as if it is externally connected.
At the host controller reset and initialization, the internal root hub port will be polled until a
new connection is detected, showing the connection of the internal hub.
The internal Hi-Speed USB hub is enumerated using a sequence similar to a standard
Hi-Speed USB hub enumeration sequence, and the polling on the root hub is stopped
because the internal Hi-Speed USB hub will never be disconnected. When enumerated,
the internal hub will report the three externally available ports.
shows the internal architecture of the SAF1761. The SAF1761 implements the
Rev. 01 — 18 November 2009
1.0”.
Ref. 2 “Enhanced Host Controller Interface Specification for
Hi-Speed USB OTG controller
SAF1761
© NXP B.V. 2009. All rights reserved.
14 of 166
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