saf1761 NXP Semiconductors, saf1761 Datasheet - Page 7
saf1761
Manufacturer Part Number
saf1761
Description
Hi-speed Universal Serial Bus On-the-go Controller
Manufacturer
NXP Semiconductors
Datasheet
1.SAF1761.pdf
(166 pages)
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6. Pinning information
Table 2.
SAF1761_1
Product data sheet
Symbol
OC3_N
REF5V
ID
GNDA
REG1V8
V
V
GND(OSC)
REG3V3
V
XTAL1
XTAL2
CC(5V0)
CC(5V0)
CC(I/O)
[1][2]
Pin description
Pin
LQFP128
1
2
3
4
5
6
7
8
9
10
11
12
6.1 Pinning
6.2 Pin description
Fig 2.
Type
AI/I
AI
I
G
P
P
P
G
P
P
AI
AO
[3]
Pin configuration (LQFP128); top view
Description
port 3 analog (5 V input) and digital overcurrent input; if not used, connect to
V
input, 5 V tolerant
5 V reference input for analog OC detector; connect a 100 nF decoupling capacitor
ID input to detect the default host or peripheral setting when port 1 is in OTG mode;
pull-up to 3.3 V through a 4.7 k resistor
input, 3.3 V tolerant
analog ground
core power output (1.8 V); internal 1.8 V for the digital core; used for decoupling;
connect a 100 nF capacitor; for details on additional capacitor placement, see
Section 7.8
input to internal regulators (3.0 V-to-5.5 V); connect a 100 nF decoupling capacitor;
see
input to internal regulators (3.0 V-to-5.5 V); connect a 100 nF decoupling capacitor;
see
oscillator ground
regulator output (3.3 V); for decoupling only; connect a 100 nF capacitor and a
4.7 F-to-10 F capacitor; see
digital supply voltage; 1.65 V to 3.6 V; connect a 100 nF decoupling capacitor; see
Section 7.8
12 MHz crystal connection input; connect to ground if an external clock is used
12 MHz crystal connection output
CC(I/O)
Section 7.8
Section 7.8
through a 10 k resistor
Rev. 01 — 18 November 2009
38
1
SAF1761BE
Section 7.8
001aai627
102
65
Hi-Speed USB OTG controller
SAF1761
© NXP B.V. 2009. All rights reserved.
7 of 166
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